dtm48-td.lst

M48做的航模用直流电机调速器

__text_start:
__start:
    001B EFCF      LDI	R28,0xFF
    001C E0D2      LDI	R29,2
    001D BFCD      OUT	0x3D,R28
    001E BFDE      OUT	0x3E,R29
    001F 51C0      SUBI	R28,0x10
    0020 40D0      SBCI	R29,0
    0021 EA0A      LDI	R16,0xAA
    0022 8308      STD	Y+0,R16
    0023 2400      CLR	R0
    0024 E0E2      LDI	R30,2
    0025 E0F1      LDI	R31,1
    0026 E011      LDI	R17,1
    0027 30EE      CPI	R30,0xE
    0028 07F1      CPC	R31,R17
    0029 F011      BEQ	0x002C
    002A 9201      ST	R0,Z+
    002B CFFB      RJMP	0x0027
    002C 8300      STD	Z+0,R16
    002D E3E4      LDI	R30,0x34
    002E E0F0      LDI	R31,0
    002F E0A0      LDI	R26,0
    0030 E0B1      LDI	R27,1
    0031 E010      LDI	R17,0
    0032 33E6      CPI	R30,0x36
    0033 07F1      CPC	R31,R17
    0034 F021      BEQ	0x0039
    0035 95C8      LPM
    0036 9631      ADIW	R30,1
    0037 920D      ST	R0,X+
    0038 CFF9      RJMP	0x0032
    0039 D116      RCALL	_main
_exit:
    003A CFFF      RJMP	_exit
FILE: H:\ele\AVR\ICC\diantiao\dtm48-td\dtm48-td.C
(0001) /******************************************/
(0002) /*         燕山大学无线电爱好者协会       */
(0003) /*                电子调速器              */
(0004) /*     作者:张翃鹏     2005-2-27 9:04:40  */
(0005) /*     目标MCU:MEGA8    晶振:INT RC 8MHZ  */
(0006) /******************************************/
(0007) 
(0008) #include <iom48v.h>
(0009) #include <macros.h>
(0010) #include <eeprom.h>
(0011) #define uchar unsigned char
(0012) #define unit unsigned int
(0013) #define ulong unsigned long
(0014) #define xtal 8 
(0015) #define j11 PORTD|=0x02
(0016) #define j10 PORTD&=~0x02
(0017) #define j21 PORTD|=0x10
(0018) #define j20 PORTD&=~0x10
(0019) #define j31 PORTB|=0x40
(0020) #define j30 PORTB&=~0x40
(0021) #define j41 PORTD|=0x40
(0022) #define j40 PORTD&=~0x40
(0023) #define LED1 PORTB|=0x08;
(0024) #define LED0 PORTB&=~0x08;
(0025) 
(0026) 
(0027) int mark=1500;
(0028) unit ai,aa;
(0029) uchar i,j,az,flag,flagh,zb,mid,pwm;
(0030) 
(0031) void port_init(void)
(0032) {
(0033)  PORTB = 0x23;
_port_init:
    003B E283      LDI	R24,0x23
    003C B985      OUT	0x05,R24
(0034)  DDRB  = 0x58;
    003D E588      LDI	R24,0x58
    003E B984      OUT	0x04,R24
(0035)  PORTC = 0x04; //m103 output only
    003F E084      LDI	R24,4
    0040 B988      OUT	0x08,R24
(0036)  DDRC  = 0x38;
    0041 E388      LDI	R24,0x38
    0042 B987      OUT	0x07,R24
(0037)  PORTD = 0x00;
    0043 2422      CLR	R2
    0044 B82B      OUT	0x0B,R2
(0038)  DDRD  = 0x52;
    0045 E582      LDI	R24,0x52
    0046 B98A      OUT	0x0A,R24
    0047 9508      RET
(0039) }
(0040) 
(0041) void timer1_init(void)
(0042) {
(0043)  TCCR1B = 0x00; //stop
_timer1_init:
    0048 2422      CLR	R2
    0049 92200081  STS	0x81,R2
(0044)  TCNT1H = 0x00 /*INVALID SETTING*/; //setup
    004B 92200085  STS	0x85,R2
(0045)  TCNT1L = 0x00 /*INVALID SETTING*/;
    004D 92200084  STS	0x84,R2
(0046)  OCR1AH = 0x00 /*INVALID SETTING*/;
    004F 92200089  STS	0x89,R2
(0047)  OCR1AL = 0x00 /*INVALID SETTING*/;
    0051 92200088  STS	0x88,R2
(0048)  OCR1BH = 0x00 /*INVALID SETTING*/;
    0053 9220008B  STS	0x8B,R2
(0049)  OCR1BL = 0x00 /*INVALID SETTING*/;
    0055 9220008A  STS	0x8A,R2
(0050)  ICR1H  = 0x00 /*INVALID SETTING*/;
    0057 92200087  STS	0x87,R2
(0051)  ICR1L  = 0x00 /*INVALID SETTING*/;
    0059 92200086  STS	0x86,R2
(0052)  TCCR1A = 0x00;
    005B 92200080  STS	0x80,R2
(0053)  TCCR1B = 0x02; //start Timer
    005D E082      LDI	R24,2
    005E 93800081  STS	0x81,R24
    0060 9508      RET
(0054) }
(0055) 
(0056) //TIMER2 initialize - prescale:8
(0057) // WGM: Normal
(0058) // desired value: 255uSec
(0059) // actual value: 255.000uSec (0.0%)
(0060) void timer2_init(void)
(0061) {
(0062)  TCCR2B = 0x00; //stop
_timer2_init:
    0061 2422      CLR	R2
    0062 922000B1  STS	0xB1,R2
(0063)  ASSR  = 0x00; //set async mode
    0064 922000B6  STS	0xB6,R2
(0064)  TCNT2 = 0x01; //setup
    0066 E081      LDI	R24,1
    0067 938000B2  STS	0xB2,R24
(0065)  OCR2A = 0;
    0069 922000B3  STS	0xB3,R2
(0066)  OCR2B = 0x00;
    006B 922000B4  STS	0xB4,R2
(0067)  TCCR2A = 0x00; 
    006D 922000B0  STS	0xB0,R2
(0068)  TCCR2B = 0x02; //start
    006F E082      LDI	R24,2
    0070 938000B1  STS	0xB1,R24
    0072 9508      RET
(0069) }
(0070) void watchdog_init(void)
(0071) {
(0072)  WDR(); //this prevents a timout on enabling
_watchdog_init:
    0073 95A8      WDR
(0073)  WDTCSR = 0x08; //WATCHDOG ENABLED - dont forget to issue WDRs
    0074 E088      LDI	R24,0x8
    0075 93800060  STS	0x60,R24
    0077 9508      RET
(0074) }
(0075) 
(0076) 
(0077) //call this routine to initialize all peripherals
(0078) void init_devices(void)
(0079) {
(0080)  //stop errant interrupts until set up
(0081)  CLI(); //disable all interrupts
_init_devices:
    0078 94F8      BCLR	7
(0082)  port_init();
    0079 DFC1      RCALL	_port_init
(0083)  timer1_init();
    007A DFCD      RCALL	_timer1_init
(0084)  timer2_init();
    007B DFE5      RCALL	_timer2_init
(0085)  watchdog_init();
    007C DFF6      RCALL	_watchdog_init
(0086) 
(0087)  MCUCR = 0x00;
    007D 2422      CLR	R2
    007E BE25      OUT	0x35,R2
(0088)  EICRA = 0x00; //extended ext ints
    007F 92200069  STS	0x69,R2
(0089)  EIMSK = 0x00;
    0081 BA2D      OUT	0x1D,R2
(0090)  
(0091)  TIMSK0 = 0x00; //timer 0 interrupt sources
    0082 9220006E  STS	0x6E,R2
(0092)  TIMSK1 = 0x00; //timer 1 interrupt sources
    0084 9220006F  STS	0x6F,R2
(0093)  TIMSK2 = 0x03; //timer 2 interrupt sources 
    0086 E083      LDI	R24,3
    0087 93800070  STS	0x70,R24
(0094) 
(0095)  PCMSK0 = 0x00; //pin change mask 0 
    0089 9220006B  STS	0x6B,R2
(0096)  PCMSK1 = 0x00; //pin change mask 1 
    008B 9220006C  STS	0x6C,R2
(0097)  PCMSK2 = 0x00; //pin change mask 2
    008D 9220006D  STS	0x6D,R2
(0098)  PCICR = 0x00; //pin change enable 
    008F 92200068  STS	0x68,R2
(0099)  PRR = 0x00; //power controller
    0091 92200064  STS	0x64,R2
(0100)  SEI(); //re-enable interrupts
    0093 9478      BSET	7
    0094 9508      RET
(0101)  //all peripherals are now initialized
(0102) }
(0103) 
(0104) 
(0105) /*		微秒级延时程序	*/	
(0106) void del(int time)
(0107) 	 {     
(0108)   	  do
(0109) 	  	{
(0110) 		 time--;
_del:
  time                 --> R16
    0095 5001      SUBI	R16,1
    0096 4010      SBCI	R17,0
(0111) 		}	
(0112)   	  while (time>1);
    0097 E081      LDI	R24,1
    0098 E090      LDI	R25,0
    0099 1780      CP	R24,R16
    009A 0791      CPC	R25,R17
    009B F3CC      BLT	0x0095
    009C 9508      RET
(0113) 	 }
(0114) 	 
(0115) /*	   毫秒级延时程序   	*/	 
(0116) void delay_1ms(void)
(0117) { unsigned int i1;
(0118)  for(i1=1;i1<(unsigned int)(xtal*143-2);i1++)
_delay_1ms:
  i1                   --> R16
    009D E001      LDI	R16,1
    009E E010      LDI	R17,0
    009F C002      RJMP	0x00A2
    00A0 5F0F      SUBI	R16,0xFF
    00A1 4F1F      SBCI	R17,0xFF
    00A2 3706      CPI	R16,0x76
    00A3 E0E4      LDI	R30,4
    00A4 071E      CPC	R17,R30
    00A5 F3D0      BCS	0x00A0
    00A6 9508      RET
_delay:
  i2                   --> R20
  n                    --> R22
    00A7 D13D      RCALL	push_gset2
    00A8 01B8      MOVW	R22,R16
(0119)     ;
(0120) }
(0121) 
(0122) void delay(unsigned int n)
(0123) {
(0124)  unsigned int i2=0;
    00A9 2744      CLR	R20
    00AA 2755      CLR	R21
    00AB C004      RJMP	0x00B0
(0125)    while(i2<n)
(0126)    {delay_1ms();
    00AC DFF0      RCALL	_delay_1ms
(0127)     i2++; WDR();
    00AD 5F4F      SUBI	R20,0xFF
    00AE 4F5F      SBCI	R21,0xFF
    00AF 95A8      WDR
    00B0 1746      CP	R20,R22
    00B1 0757      CPC	R21,R23
    00B2 F3C8      BCS	0x00AC
    00B3 D127      RCALL	pop_gset2
    00B4 9508      RET
_timer2_compa_isr:
    00B5 938A      ST	R24,-Y
    00B6 B78F      IN	R24,0x3F
    00B7 938A      ST	R24,-Y
(0128)    }
(0129) }
(0130) 
(0131) #pragma interrupt_handler timer2_compa_isr:8
(0132) void timer2_compa_isr(void)
(0133) {
(0134)  //compare occured TCNT2=OCR2a
(0135)  if(zb<255)
    00B8 91800104  LDS	R24,zb
    00BA 3F8F      CPI	R24,0xFF
    00BB F420      BCC	0x00C0
(0136)   {j10;j20; j30;j40;} 
    00BC 9859      CBI	0x0B,1
    00BD 985C      CBI	0x0B,4
    00BE 982E      CBI	0x05,6
    00BF 985E      CBI	0x0B,6
    00C0 9189      LD	R24,Y+
    00C1 BF8F      OUT	0x3F,R24
    00C2 9189      LD	R24,Y+
    00C3 9518      RETI
_timer2_ovf_isr:
    00C4 922A      ST	R2,-Y
    00C5 923A      ST	R3,-Y
    00C6 938A      ST	R24,-Y
    00C7 B62F      IN	R2,0x3F
    00C8 922A      ST	R2,-Y
(0137) }
(0138) 
(0139) #pragma interrupt_handler timer2_ovf_isr:10
(0140) void timer2_ovf_isr(void)
(0141) {
(0142)   if(zb>0)
    00C9 2422      CLR	R2
    00CA 90300104  LDS	R3,zb
    00CC 1423      CP	R2,R3
    00CD F468      BCC	0x00DB
(0143)   {
(0144)   if(flag==1)
    00CE 91800106  LDS	R24,flag
    00D0 3081      CPI	R24,1
    00D1 F419      BNE	0x00D5
(0145)    {j11;j31;}
    00D2 9A59      SBI	0x0B,1
    00D3 9A2E      SBI	0x05,6
    00D4 C006      RJMP	0x00DB
(0146)    else
(0147)   if(flag==0)
    00D5 90200106  LDS	R2,flag
    00D7 2022      TST	R2
    00D8 F411      BNE	0x00DB
(0148)    {j21;j41;}  
    00D9 9A5C      SBI	0x0B,4
    00DA 9A5E      SBI	0x0B,6
(0149)   }
(0150)  TCNT2 = 0x0; //reload counter value
    00DB 2422      CLR	R2
    00DC 922000B2  STS	0xB2,R2
(0151)  OCR2A=zb;
    00DE 90200104  LDS	R2,zb
    00E0 922000B3  STS	0xB3,R2
    00E2 9029      LD	R2,Y+
    00E3 BE2F      OUT	0x3F,R2
    00E4 9189      LD	R24,Y+
    00E5 9039      LD	R3,Y+
    00E6 9029      LD	R2,Y+
    00E7 9518      RETI
_fenc:
  bc                   --> R20
  bb                   --> R16
    00E8 D0FE      RCALL	push_gset1
(0152) }
(0153) 
(0154) 
(0155) unit fenc(int bb)             
(0156) {
(0157)  int bc;        
(0158)  if((bb<mark-700)||(bb>(mark+700))) return(0);              
    00E9 91800100  LDS	R24,mark
    00EB 91900101  LDS	R25,mark+1
    00ED 5B8C      SUBI	R24,0xBC
    00EE 4092      SBCI	R25,2
    00EF 1708      CP	R16,R24
    00F0 0719      CPC	R17,R25
    00F1 F04C      BLT	0x00FB
    00F2 91800100  LDS	R24,mark
    00F4 91900101  LDS	R25,mark+1
    00F6 5484      SUBI	R24,0x44
    00F7 4F9D      SBCI	R25,0xFD
    00F8 1780      CP	R24,R16
    00F9 0791      CPC	R25,R17
    00FA F41C      BGE	0x00FE
    00FB 2700      CLR	R16
    00FC 2711      CLR	R17
    00FD C037      RJMP	0x0135
(0159)  if(mark<bb)  
    00FE 90200100  LDS	R2,mark
    0100 90300101  LDS	R3,mark+1
    0102 1620      CP	R2,R16
    0103 0631      CPC	R3,R17
    0104 F434      BGE	0x010B
(0160)   {
(0161)   flag=1;
    0105 E081      LDI	R24,1
    0106 93800106  STS	flag,R24
(0162)   bc=bb-mark;
    0108 01A8      MOVW	R20,R16
    0109 1942      SUB	R20,R2
    010A 0953      SBC	R21,R3
(0163)   }
(0164)  if(mark>bb)
    010B 90200100  LDS	R2,mark