koe_inter_all.mdl

此程序给出了WCDMA系统的simulink仿真程序及完整的程序

Model {
  Name			  "koe_inter_all"
  Version		  3.00
  SimParamPage		  "Solver"
  SampleTimeColors	  on
  InvariantConstants	  off
  WideVectorLines	  off
  ShowLineWidths	  on
  ShowPortDataTypes	  off
  StartTime		  "0.0"
  StopTime		  "4"
  SolverMode		  "Auto"
  Solver		  "ode45"
  RelTol		  "1e-3"
  AbsTol		  "auto"
  Refine		  "1"
  MaxStep		  "auto"
  InitialStep		  "auto"
  FixedStep		  "auto"
  MaxOrder		  5
  OutputOption		  "RefineOutputTimes"
  OutputTimes		  "[]"
  LoadExternalInput	  off
  ExternalInput		  "[t, u]"
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  SaveState		  off
  StateSaveName		  "xout"
  SaveOutput		  on
  OutputSaveName	  "yout"
  LoadInitialState	  off
  InitialState		  "xInitial"
  SaveFinalState	  off
  FinalStateName	  "xFinal"
  SaveFormat		  "Matrix"
  LimitMaxRows		  off
  MaxRows		  "1000"
  Decimation		  "1"
  AlgebraicLoopMsg	  "warning"
  MinStepSizeMsg	  "warning"
  UnconnectedInputMsg	  "warning"
  UnconnectedOutputMsg	  "warning"
  UnconnectedLineMsg	  "warning"
  InheritedTsInSrcMsg	  "warning"
  IntegerOverflowMsg	  "warning"
  UnnecessaryDatatypeConvMsg "none"
  Int32ToFloatConvMsg	  "warning"
  SignalLabelMismatchMsg  "none"
  ConsistencyChecking	  "off"
  ZeroCross		  on
  SimulationMode	  "normal"
  BlockDataTips		  on
  BlockParametersDataTip  on
  BlockAttributesDataTip  off
  BlockPortWidthsDataTip  off
  BlockDescriptionStringDataTip	off
  BlockMaskParametersDataTip off
  ToolBar		  on
  StatusBar		  on
  BrowserShowLibraryLinks off
  BrowserLookUnderMasks	  off
  OptimizeBlockIOStorage  on
  BufferReuse		  on
  BooleanDataType	  off
  RTWSystemTargetFile	  "grt.tlc"
  RTWInlineParameters	  off
  RTWRetainRTWFile	  off
  RTWTemplateMakefile	  "grt_default_tmf"
  RTWMakeCommand	  "make_rtw"
  RTWGenerateCodeOnly	  off
  ExtModeMexFile	  "ext_comm"
  ExtModeBatchMode	  off
  ExtModeTrigType	  "manual"
  ExtModeTrigMode	  "oneshot"
  ExtModeTrigPort	  "1"
  ExtModeTrigElement	  "any"
  ExtModeTrigDuration	  1000
  ExtModeTrigHoldOff	  0
  ExtModeTrigDelay	  0
  ExtModeTrigDirection	  "rising"
  ExtModeTrigLevel	  0
  ExtModeArchiveMode	  "off"
  ExtModeAutoIncOneShot	  off
  ExtModeIncDirWhenArm	  off
  ExtModeAddSuffixToVar	  off
  ExtModeWriteAllDataToWs off
  ExtModeArmWhenConnect	  off
  PreLoadFcn		  "N=32;nFrames=1;int_col=2;"
  Created		  "Wed Jun  2 16:46:26 1999"
  Creator		  "maarit"
  UpdateHistory		  "UpdateHistoryNever"
  ModifiedByFormat	  "%<Auto>"
  LastModifiedBy	  "maarit"
  ModifiedDateFormat	  "%<Auto>"
  LastModifiedDate	  "Wed Jun 16 11:05:15 1999"
  ModelVersionFormat	  "1.%<AutoIncrement:71>"
  ConfigurationManager	  "none"
  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
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  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "koe_inter_all"
    Location		    [34, 237, 1190, 954]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "usletter"
    PaperUnits		    "inches"
    ZoomFactor		    "100"
    AutoZoom		    on
    ReportName		    "simulink-default.rpt"
    Block {
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      Position		      [20, 183, 80, 227]
      ForegroundColor	      "green"
      ShowName		      off
      FontName		      "helvetica"
      FontSize		      14
      FontWeight	      "bold"
      SourceBlock	      "utra_lib/Source blocks/ 8"
      SourceType	      ""
      N			      "N*nFrames"
    }
    Block {
      BlockType		      Constant
      Name		      "Constant"
      Position		      [290, 275, 320, 305]
      ShowName		      off
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    }
    Block {
      BlockType		      Reference
      Name		      "Delayed ber calculation"
      Ports		      [2, 1, 0, 0, 0]
      Position		      [559, 450, 721, 580]
      Orientation	      "down"
      ForegroundColor	      "green"
      NamePlacement	      "alternate"
      SourceBlock	      "utra_lib/Delayed ber calculation"
      SourceType	      ""
      N			      "N*nFrames"
      nFrames		      "nFrames"
    }
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    Block {
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      Position		      [525, 610, 625, 640]
      Orientation	      "left"
      NamePlacement	      "alternate"
      ShowName		      off
      Format		      "short"
      Decimation	      "1"
      Floating		      off
      SampleTime	      "-1"
    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace1"
      Position		      [760, 125, 820, 155]
      ShowName		      off
      VariableName	      "q2"
      Buffer		      "inf"
      Decimation	      "1"
      SampleTime	      "-1"
      SaveFormat	      "Matrix"
    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace14"
      Position		      [655, 610, 715, 640]
      ShowName		      off
      VariableName	      "ber"
      Buffer		      "inf"
      Decimation	      "1"
      SampleTime	      "-1"
      SaveFormat	      "Matrix"
    }
    Block {
      BlockType		      ToWorkspace
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      VariableName	      "fl"
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    Block {
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      VariableName	      "fl1"
      Buffer		      "inf"
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      SaveFormat	      "Matrix"
    }
    Block {
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      Name		      "To Workspace5"
      Position		      [120, 125, 180, 155]
      ShowName		      off
      VariableName	      "in"
      Buffer		      "inf"
      Decimation	      "1"
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    }
    Block {
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      ShowName		      off
      VariableName	      "q1"
      Buffer		      "inf"
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    Block {
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      Buffer		      "inf"
      Decimation	      "1"
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    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace8"
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      ShowName		      off
      VariableName	      "w1"
      Buffer		      "inf"
      Decimation	      "1"
      SampleTime	      "-1"
      SaveFormat	      "Matrix"
    }
    Block {
      BlockType		      Reference
      Name		      "inter_interleaving"
      Ports		      [2, 2, 0, 0, 0]
      Position		      [760, 172, 895, 303]
      ForegroundColor	      "blue"
      SourceBlock	      "utra_lib/DL/dl_RX_demodulation/inter_interleavi"
"ng"
      SourceType	      ""
      bits_in_frame	      "N"
      rows		      "int_col"
      nFrames		      "nFrames"
    }
    Block {
      BlockType		      Reference
      Name		      "inter_interleaving2"
      Ports		      [1, 1, 0, 0, 0]
      Position		      [115, 173, 215, 237]
      ForegroundColor	      "blue"
      SourceBlock	      "utra_lib/DL/dl_TX_modulation/inter_interleaving"
      SourceType	      ""
      bits_in_frame	      "N"
      nFrames		      "nFrames"
      cols		      "int_col"
    }
    Block {
      BlockType		      Reference
      Name		      "intra_de_interleaving1"
      Ports		      [2, 2, 0, 0, 0]
      Position		      [550, 174, 685, 301]
      ForegroundColor	      "yellow"
      SourceBlock	      "utra_lib/DL/dl_RX_demodulation/intra_de_interle"
"aving"
      SourceType	      ""
      nDeIntra		      "N"
      nFrames		      "nFrames"
      Intra_int_flag	      "0"
    }
    Block {
      BlockType		      Reference
      Name		      "intra_interleaving2"
      Ports		      [1, 1, 0, 0, 0]
      Position		      [250, 172, 375, 238]
      ForegroundColor	      "yellow"
      SourceBlock	      "utra_lib/DL/dl_TX_modulation/intra_interleaving"
"1"
      SourceType	      ""
      bits_in_frame	      "N"
      nFrames		      "nFrames"
      nSlot		      "16"
      Intra_int_flag	      "0"
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    Block {
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      Name		      "oma buffer"
      Ports		      [2, 2, 0, 0, 0]
      Position		      [405, 192, 495, 243]
      ForegroundColor	      "yellow"
      SourceBlock	      "utra_lib/oma buffer"
      SourceType	      ""
      n_in		      "N/16"
      n_out		      "N"
      n_buff		      "2"
      nSlot		      "16"
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    Line {
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      SrcPort		      1
      Points		      [0, 40]
      Branch {
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	DstPort			1
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      Branch {
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	DstPort			1
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    Line {
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      Points		      [60, 0; 0, -60]
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      DstPort		      2
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      SrcBlock		      "oma buffer"
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      Points		      [30, 0]
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	DstPort			1
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	DstPort			1
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      Points		      [0, 0]
      Branch {
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	DstPort			1
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	DstBlock		"intra_de_interleaving1"
	DstPort			2
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      Points		      [10, 0]
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	  DstPort		  1
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      Labels		      [1, 0]
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	DstPort			1
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      Points		      [10, 0; 0, 85]
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      SrcPort		      1
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    Annotation {
      Position		      [88, 286]
      Text		      "sample time 1\n                    = nFrames * "
"frame"
    }
    Annotation {
      Position		      [119, 68]
      Text		      "This is a test block for testing\n\ninter frame"
" interleaver and \nintra frame interleaver\n(not yet implemented)\n\n\n"
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      FontSize		      12
      FontWeight	      "bold"
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    Annotation {
      Position		      [168, 519]
      Text		      "Parameters to be set before simulation:\n\nN = "
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"lumns for interleaer"
      FontName		      "helvetica"
      FontSize		      12
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    Annotation {
      Position		      [363, 356]
      Text		      "sample time 2\n                    = frame / 16"
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}