koe_channel_rake_inter_control.mdl

此程序给出了WCDMA系统的simulink仿真程序及完整的程序

      Orientation	      "up"
      SourceBlock	      "utra_lib/Test functions/hard decission"
      SourceType	      ""
      mode		      on
      N			      "(N+nPilot+TFI+TPC)*length(C)/2"
      thres		      "0"
      nFrames		      "1"
    }
    Block {
      BlockType		      Reference
      Name		      "hard decission1"
      Ports		      [1, 1, 0, 0, 0]
      Position		      [485, 775, 585, 815]
      Orientation	      "left"
      NamePlacement	      "alternate"
      SourceBlock	      "utra_lib/Test functions/hard decission"
      SourceType	      ""
      mode		      off
      N			      "16*N"
      thres		      "0"
      nFrames		      "1"
    }
    Block {
      BlockType		      Reference
      Name		      "inter_de_interleaving"
      Ports		      [2, 2, 0, 0, 0]
      Position		      [695, 758, 830, 907]
      Orientation	      "left"
      NamePlacement	      "alternate"
      SourceBlock	      "utra_lib/Modulation  blocks/dl_RX_demodulation/"
"inter_de_interleaving"
      SourceType	      ""
      bits_in_frame	      "N*16"
      rows		      "1"
      nFrames		      "1"
    }
    Block {
      BlockType		      Reference
      Name		      "inter_interleaving"
      Ports		      [1, 1, 0, 0, 0]
      Position		      [80, 125, 180, 185]
      Orientation	      "down"
      NamePlacement	      "alternate"
      SourceBlock	      "utra_lib/Modulation  blocks/dl_TX_modulation/in"
"ter_interleaving"
      SourceType	      ""
      bits_in_frame	      "N*16"
      nFrames		      "1"
      cols		      "1"
    }
    Block {
      BlockType		      Reference
      Name		      "intra_de_interleaving"
      Ports		      [2, 2, 0, 0, 0]
      Position		      [925, 759, 1055, 906]
      Orientation	      "left"
      NamePlacement	      "alternate"
      SourceBlock	      "utra_lib/Modulation  blocks/dl_RX_demodulation/"
"intra_de_interleaving"
      SourceType	      ""
      nDeIntra		      "N*16"
      nFrames		      "1"
      Intra_int_flag	      "0"
    }
    Block {
      BlockType		      Reference
      Name		      "intra_interleaving1"
      Ports		      [1, 1, 0, 0, 0]
      Position		      [67, 210, 193, 280]
      Orientation	      "down"
      NamePlacement	      "alternate"
      SourceBlock	      "utra_lib/Modulation  blocks/dl_TX_modulation/in"
"tra_interleaving"
      SourceType	      ""
      bits_in_frame	      "16*N"
      nFrames		      "1"
      nSlot		      "16"
      Intra_int_flag	      "0"
    }
    Block {
      BlockType		      Reference
      Name		      "modulation1"
      Ports		      [1, 2, 0, 0, 0]
      Position		      [235, 288, 305, 457]
      SourceBlock	      "utra_lib/Modulation  blocks/dl_TX_modulation/mo"
"dulation"
      SourceType	      ""
      Ndisc		      "N+nPilot+TFI+TPC"
      C			      "C"
      nSlot		      "16"
    }
    Line {
      SrcBlock		      "Direct ber calculation1"
      SrcPort		      1
      Points		      [-45, 0; 0, -10]
      Branch {
	DstBlock		"To Workspace15"
	DstPort			1
      }
      Branch {
	DstBlock		"Display37"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "hard decission"
      SrcPort		      1
      Points		      [0, -5]
      DstBlock		      "Direct ber calculation1"
      DstPort		      2
    }
    Line {
      Labels		      [2, 0]
      SrcBlock		      "Channel estimator"
      SrcPort		      1
      Points		      [0, -5; 30, 0]
      Branch {
	Points			[0, -55]
	DstBlock		"To Workspace9"
	DstPort			1
      }
      Branch {
	Points			[35, 0]
	Branch {
	  Points		  [40, 0]
	  DstBlock		  "dl_rake"
	  DstPort		  2
	}
	Branch {
	  Points		  [0, 190]
	  DstBlock		  "dl_rake1"
	  DstPort		  2
	}
      }
    }
    Line {
      SrcBlock		      "modulation1"
      SrcPort		      1
      Points		      [5, 0]
      Branch {
	Points			[0, -70; 45, 0]
	Branch {
	  Points		  [-45, 0]
	  DstBlock		  "To Workspace16"
	  DstPort		  1
	}
	Branch {
	  Points		  [105, 0]
	  DstBlock		  "Direct ber calculation1"
	  DstPort		  1
	}
      }
      Branch {
	DstBlock		"channel3"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "channel3"
      SrcPort		      1
      Points		      [50, 0]
      Branch {
	Points			[0, -85]
	Branch {
	  DstBlock		  "To Workspace13"
	  DstPort		  1
	}
	Branch {
	  DstBlock		  "hard decission"
	  DstPort		  1
	}
      }
      Branch {
	Points			[160, 0]
	Branch {
	  DstBlock		  "dl_rake"
	  DstPort		  1
	}
	Branch {
	  Points		  [0, 195]
	  DstBlock		  "dl_rake1"
	  DstPort		  1
	}
      }
    }
    Line {
      SrcBlock		      "modulation1"
      SrcPort		      2
      DstBlock		      "channel3"
      DstPort		      2
    }
    Line {
      SrcBlock		      "channel3"
      SrcPort		      3
      Points		      [0, 5; 10, 0]
      Branch {
	Points			[0, 80]
	DstBlock		"To Workspace11"
	DstPort			1
      }
      Branch {
	DstBlock		"Channel estimator"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "Channel estimator"
      SrcPort		      2
      Points		      [10, 0]
      Branch {
	Points			[0, 95]
	DstBlock		"To Workspace18"
	DstPort			1
      }
      Branch {
	Points			[20, 0]
	Branch {
	  Points		  [75, 0]
	  DstBlock		  "dl_rake"
	  DstPort		  3
	}
	Branch {
	  Points		  [0, 190]
	  DstBlock		  "dl_rake1"
	  DstPort		  3
	}
      }
    }
    Line {
      SrcBlock		      "channel3"
      SrcPort		      2
      Points		      [15, 0]
      Branch {
	Points			[0, -60]
	DstBlock		"To Workspace10"
	DstPort			1
      }
      Branch {
	Points			[15, 0]
	DstBlock		"Channel estimator"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "dl_rake"
      SrcPort		      3
      DstBlock		      "demodulation"
      DstPort		      3
    }
    Line {
      SrcBlock		      "dl_rake"
      SrcPort		      4
      DstBlock		      "demodulation"
      DstPort		      4
    }
    Line {
      SrcBlock		      "data source 01 ..10"
      SrcPort		      1
      Points		      [-5, 0]
      Branch {
	DstBlock		"To Workspace4"
	DstPort			1
      }
      Branch {
	Points			[0, 30]
	Branch {
	  DstBlock		  "inter_interleaving"
	  DstPort		  1
	}
	Branch {
	  Points		  [90, 0; 0, 705]
	  DstBlock		  "Delayed ber calculation1"
	  DstPort		  1
	}
      }
    }
    Line {
      SrcBlock		      "control_mux"
      SrcPort		      1
      DstBlock		      "modulation1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "intra_interleaving1"
      SrcPort		      1
      Points		      [0, 120]
      DstBlock		      "control_mux"
      DstPort		      2
    }
    Line {
      SrcBlock		      "inter_interleaving"
      SrcPort		      1
      DstBlock		      "intra_interleaving1"
      DstPort		      1
    }
    Line {
      SrcBlock		      " add control"
      SrcPort		      1
      DstBlock		      "control_mux"
      DstPort		      1
    }
    Line {
      SrcBlock		      "hard decission1"
      SrcPort		      1
      Points		      [-70, 0]
      DstBlock		      "Delayed ber calculation1"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Delayed ber calculation1"
      SrcPort		      1
      Points		      [0, 30]
      Branch {
	DstBlock		"To Workspace12"
	DstPort			1
      }
      Branch {
	DstBlock		"Display35"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "demodulation"
      SrcPort		      2
      Points		      [45, 0; 0, 460]
      DstBlock		      "intra_de_interleaving"
      DstPort		      2
    }
    Line {
      SrcBlock		      "intra_de_interleaving"
      SrcPort		      1
      DstBlock		      "inter_de_interleaving"
      DstPort		      1
    }
    Line {
      SrcBlock		      "intra_de_interleaving"
      SrcPort		      2
      DstBlock		      "inter_de_interleaving"
      DstPort		      2
    }
    Line {
      SrcBlock		      "inter_de_interleaving"
      SrcPort		      1
      Points		      [-60, 0]
      Branch {
	Points			[0, -70]
	DstBlock		"To Workspace7"
	DstPort			1
      }
      Branch {
	DstBlock		"hard decission1"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "inter_de_interleaving"
      SrcPort		      2
      DstBlock		      "To Workspace17"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Channel estimator"
      SrcPort		      3
      Points		      [20, 0]
      Branch {
	DstBlock		"dl_rake"
	DstPort			4
      }
      Branch {
	Points			[0, 195]
	DstBlock		"dl_rake1"
	DstPort			4
      }
    }
    Line {
      SrcBlock		      "channel3"
      SrcPort		      4
      Points		      [115, 0]
      Branch {
	DstBlock		"dl_rake"
	DstPort			5
      }
      Branch {
	Points			[0, 195]
	DstBlock		"dl_rake1"
	DstPort			5
      }
    }
    Line {
      SrcBlock		      "dl_rake1"
      SrcPort		      3
      DstBlock		      "demodulation1"
      DstPort		      3
    }
    Line {
      SrcBlock		      "dl_rake1"
      SrcPort		      4
      DstBlock		      "demodulation1"
      DstPort		      4
    }
    Line {
      SrcBlock		      "demodulation"
      SrcPort		      1
      Points		      [35, 0; 0, 465]
      DstBlock		      "intra_de_interleaving"
      DstPort		      1
    }
    Line {
      SrcBlock		      "dl_rake1"
      SrcPort		      1
      Points		      [20, 0]
      Branch {
	DstBlock		"demodulation1"
	DstPort			1
      }
      Branch {
	Points			[0, -35; 210, 0]
	DstBlock		"To Workspace8"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "dl_rake"
      SrcPort		      1
      Points		      [15, 0]
      Branch {
	DstBlock		"demodulation"
	DstPort			1
      }
      Branch {
	Points			[0, -50]
	DstBlock		"To Workspace14"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "dl_rake1"
      SrcPort		      2
      Points		      [15, 0]
      Branch {
	DstBlock		"demodulation1"
	DstPort			2
      }
      Branch {
	Points			[150, 0]
	Branch {
	  Points		  [35, 0]
	  DstBlock		  "Display36"
	  DstPort		  1
	}
	Branch {
	  Points		  [0, 30]
	  DstBlock		  "To Workspace20"
	  DstPort		  1
	}
      }
    }
    Line {
      SrcBlock		      "dl_rake"
      SrcPort		      2
      Points		      [15, 0]
      Branch {
	DstBlock		"demodulation"
	DstPort			2
      }
      Branch {
	Points			[0, -20; 175, 0]
	Branch {
	  DstBlock		  "Display38"
	  DstPort		  1
	}
	Branch {
	  Points		  [0, -35]
	  DstBlock		  "To Workspace19"
	  DstPort		  1
	}
      }
    }
    Annotation {
      Position		      [1043, 110]
      Text		      "Defined at opening:\n\nN = 32\nC  = [ 1 1 -1 -1"
" ]\n\nNumber of control bits\nnPilot = 8\nTFI = 2\nTPC = 4\n\nNOTE:  that to "
"be on the safe side  \nN + sum(control) %2 ==0\n"
      FontName		      "helvetica"
      FontSize		      12
      FontWeight	      "bold"
    }
    Annotation {
      Position		      [833, 105]
      Text		      "TESTING MODEL FOR\n\ninterleavers\nadding contr"
"ol bits\nmodulation\nchannel \nrake receiver\ndemodulation\nremoving control "
"bits\ndeinterleavers"
      FontName		      "helvetica"
      FontSize		      14
      FontWeight	      "bold"
    }
  }
}