otherinfo.inc

pipe类 pipe类 pipe类 pipe类 pipe类

procedure cCPUid.GetUMCAdvData;
begin
flevel2.CachePerCPU:=1;
case fCPUid_m.std_family of
4: begin
    DelayTime:=50;
    case fCPUid_m.std_model of
     1: begin
        cnameinfo.codename:='U5D';
        cnameinfo.cpuname:='U80486DX Processor';
        cnameinfo.model_descr:='80486';
        cnameinfo.procnum:=0401;
        end;
     2: begin
        cnameinfo.codename:='U5S';
        cnameinfo.cpuname:='U80486SX Processor';
        cnameinfo.model_descr:='80486';
        cnameinfo.procnum:=0401;
        end;
    end;
   end;
end;
end;

procedure cCPUid.GetNexgenAdvData;
begin
flevel2.CachePerCPU:=1;
case fCPUid_m.std_family of
5: begin
    DelayTime:=100;
    case fCPUid_m.std_model of
     0: begin
        cnameinfo.codename:='Nx586';
        cnameinfo.cpuname:='NexGen Nx586';
        cnameinfo.model_descr:='80586';
        cnameinfo.procnum:=0601;
        cnameinfo.technological.process:='CMOS 0,44祄';
        cnameinfo.technological.transistors:='3.5M';
        cnameinfo.technological.diesize:='118';
        end;
     6: begin
        cnameinfo.codename:='HA';
        cnameinfo.cpuname:='NexGen Nx686';
        cnameinfo.model_descr:='80686';
        cnameinfo.procnum:=0602;
        cnameinfo.technological.process:='CMOS 0,35祄';
        cnameinfo.technological.transistors:='6M';
        cnameinfo.technological.diesize:='150';
        end;
    end;
   end;
end;
end;

procedure cCPUid.GetRiseAdvData;
begin
flevel2.CachePerCPU:=1;
case fCPUid_m.std_family of
5: begin
  //GetDMIMultiplier(i);
    case fCPUid_m.std_model of
     0: begin
        cnameinfo.codename:='Kirin';
        cnameinfo.cpuname:='Rise mP6';
        cnameinfo.model_descr:='Rise mP6';
        cnameinfo.procnum:=0701;
        cnameinfo.technological.process:='CMOS 0,25祄';
        cnameinfo.technological.transistors:='3.6M';
        cnameinfo.technological.diesize:='107';
        end;
     2: begin
        cnameinfo.codename:='Lynx';
        cnameinfo.cpuname:='Rise mP6';
        cnameinfo.model_descr:='Rise mP6';
        cnameinfo.procnum:=0701;
        cnameinfo.technological.process:='CMOS 0,18祄';
        cnameinfo.technological.transistors:='3.6M';
        cnameinfo.technological.diesize:='';
        end;
    end;
   end;
end;
end;

procedure cCPUid.GetSisAdvData;
begin
flevel2.CachePerCPU:=1;
case fCPUid_m.std_family of
5: begin
    //GetDMIMultiplier(i);
    case fCPUid_m.std_model of
     0: begin
        cnameinfo.codename:='x55';
        cnameinfo.cpuname:='SiS x55 Processor';
        cnameinfo.procnum:=0801;
        end;
    end;
   end;
end;
end;

procedure cCPUid.GetNSCAdvData;
begin
flevel2.CachePerCPU:=1;
case fCPUid_m.std_family of
5: begin
    //GetDMIMultiplier(i);
    case fCPUid_m.std_model of
     4: begin
        cnameinfo.codename:='GX1';
        cnameinfo.cpuname:='NS Geode GX1 Processor';
        cnameinfo.procnum:=1001;
        end;
     5: begin
        cnameinfo.codename:='GX2';
        cnameinfo.cpuname:='NS Geode GX2 Processor';
        cnameinfo.procnum:=1001;
        end;
    end;
   end;
end;
end;