debug_detect_peakvalue_timesim.vhd

VHDLfullCODEforCAcodeGenerator.rar为CA码发生器的完整VHDL程序

      I => un7_resultoftemp_s_16_n,
      O => resultoftemp_16_DXMUX
    );
  flagofdetect_1_cry_11_O_CYSELG_77 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => resultoftemp_11_rt,
      O => flagofdetect_1_cry_11_O_CYSELG
    );
  flagofdetect_1_cry_11_O_CYMUXG2_78 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_11_O_LOGIC_ZERO,
      IB => flagofdetect_1_cry_11_O_CYMUXF2,
      SEL => flagofdetect_1_cry_11_O_CYSELG,
      O => flagofdetect_1_cry_11_O_CYMUXG2
    );
  flagofdetect_1_cry_11_O_CYMUXFAST_79 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_11_O_CYMUXG2,
      IB => flagofdetect_1_cry_11_O_FASTCARRY,
      SEL => flagofdetect_1_cry_11_O_CYAND,
      O => flagofdetect_1_cry_11_O_CYMUXFAST
    );
  flagofdetect_1_cry_11_O_CYAND_80 : X_AND2
    port map (
      I0 => flagofdetect_1_cry_11_O_CYSELG,
      I1 => flagofdetect_1_cry_11_O_CYSELF,
      O => flagofdetect_1_cry_11_O_CYAND
    );
  flagofdetect_1_cry_11_O_FASTCARRY_81 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => flagofdetect_1_cry_9_O,
      O => flagofdetect_1_cry_11_O_FASTCARRY
    );
  flagofdetect_1_cry_11_O_COUTUSED : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => flagofdetect_1_cry_11_O_CYMUXFAST,
      O => flagofdetect_1_cry_11_O
    );
  flagofdetect_1_cry_11_O_CYSELF_82 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => resultoftemp_10_rt,
      O => flagofdetect_1_cry_11_O_CYSELF
    );
  flagofdetect_1_cry_11_O_CYMUXF2_83 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_11_O_LOGIC_ZERO,
      IB => flagofdetect_1_cry_11_O_LOGIC_ZERO,
      SEL => flagofdetect_1_cry_11_O_CYSELF,
      O => flagofdetect_1_cry_11_O_CYMUXF2
    );
  flagofdetect_1_cry_11_O_LOGIC_ZERO_84 : X_ZERO
    port map (
      O => flagofdetect_1_cry_11_O_LOGIC_ZERO
    );
  flagofdetect_1_cry_13_O_CYSELG_85 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => resultoftemp_13_rt,
      O => flagofdetect_1_cry_13_O_CYSELG
    );
  flagofdetect_1_cry_13_O_CYMUXG2_86 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_13_O_LOGIC_ZERO,
      IB => flagofdetect_1_cry_13_O_CYMUXF2,
      SEL => flagofdetect_1_cry_13_O_CYSELG,
      O => flagofdetect_1_cry_13_O_CYMUXG2
    );
  flagofdetect_1_cry_13_O_CYMUXFAST_87 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_13_O_CYMUXG2,
      IB => flagofdetect_1_cry_13_O_FASTCARRY,
      SEL => flagofdetect_1_cry_13_O_CYAND,
      O => flagofdetect_1_cry_13_O_CYMUXFAST
    );
  flagofdetect_1_cry_13_O_CYAND_88 : X_AND2
    port map (
      I0 => flagofdetect_1_cry_13_O_CYSELG,
      I1 => flagofdetect_1_cry_13_O_CYSELF,
      O => flagofdetect_1_cry_13_O_CYAND
    );
  flagofdetect_1_cry_13_O_FASTCARRY_89 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => flagofdetect_1_cry_11_O,
      O => flagofdetect_1_cry_13_O_FASTCARRY
    );
  flagofdetect_1_cry_13_O_COUTUSED : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => flagofdetect_1_cry_13_O_CYMUXFAST,
      O => flagofdetect_1_cry_13_O
    );
  flagofdetect_1_cry_13_O_CYSELF_90 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => resultoftemp_12_rt,
      O => flagofdetect_1_cry_13_O_CYSELF
    );
  flagofdetect_1_cry_13_O_CYMUXF2_91 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_13_O_LOGIC_ZERO,
      IB => flagofdetect_1_cry_13_O_LOGIC_ZERO,
      SEL => flagofdetect_1_cry_13_O_CYSELF,
      O => flagofdetect_1_cry_13_O_CYMUXF2
    );
  flagofdetect_1_cry_13_O_LOGIC_ZERO_92 : X_ZERO
    port map (
      O => flagofdetect_1_cry_13_O_LOGIC_ZERO
    );
  flagofdetect_1_cry_15_O_CYSELG_93 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => N_117_i,
      O => flagofdetect_1_cry_15_O_CYSELG
    );
  flagofdetect_1_cry_15_O_CYMUXG2_94 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_15_O_LOGIC_ONE,
      IB => flagofdetect_1_cry_15_O_CYMUXF2,
      SEL => flagofdetect_1_cry_15_O_CYSELG,
      O => flagofdetect_1_cry_15_O_CYMUXG2
    );
  flagofdetect_1_cry_15_O_CYMUXFAST_95 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_15_O_CYMUXG2,
      IB => flagofdetect_1_cry_15_O_FASTCARRY,
      SEL => flagofdetect_1_cry_15_O_CYAND,
      O => flagofdetect_1_cry_15_O_CYMUXFAST
    );
  flagofdetect_1_cry_15_O_CYAND_96 : X_AND2
    port map (
      I0 => flagofdetect_1_cry_15_O_CYSELG,
      I1 => flagofdetect_1_cry_15_O_CYSELF,
      O => flagofdetect_1_cry_15_O_CYAND
    );
  flagofdetect_1_cry_15_O_FASTCARRY_97 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => flagofdetect_1_cry_13_O,
      O => flagofdetect_1_cry_15_O_FASTCARRY
    );
  flagofdetect_1_cry_15_O_COUTUSED : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => flagofdetect_1_cry_15_O_CYMUXFAST,
      O => flagofdetect_1_cry_15_O
    );
  flagofdetect_1_cry_15_O_CYSELF_98 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => resultoftemp_14_rt,
      O => flagofdetect_1_cry_15_O_CYSELF
    );
  flagofdetect_1_cry_15_O_CYMUXF2_99 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_15_O_LOGIC_ZERO,
      IB => flagofdetect_1_cry_15_O_LOGIC_ZERO,
      SEL => flagofdetect_1_cry_15_O_CYSELF,
      O => flagofdetect_1_cry_15_O_CYMUXF2
    );
  flagofdetect_1_cry_15_O_LOGIC_ZERO_100 : X_ZERO
    port map (
      O => flagofdetect_1_cry_15_O_LOGIC_ZERO
    );
  flagofdetect_1_cry_15_O_LOGIC_ONE_101 : X_ONE
    port map (
      O => flagofdetect_1_cry_15_O_LOGIC_ONE
    );
  flagofdetect_1_cry_17_O_CYSELG_102 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => N_119_i,
      O => flagofdetect_1_cry_17_O_CYSELG
    );
  flagofdetect_1_cry_17_O_CYMUXG2_103 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_17_O_LOGIC_ONE,
      IB => flagofdetect_1_cry_17_O_CYMUXF2,
      SEL => flagofdetect_1_cry_17_O_CYSELG,
      O => flagofdetect_1_cry_17_O_CYMUXG2
    );
  flagofdetect_1_cry_17_O_CYMUXFAST_104 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_17_O_CYMUXG2,
      IB => flagofdetect_1_cry_17_O_FASTCARRY,
      SEL => flagofdetect_1_cry_17_O_CYAND,
      O => flagofdetect_1_cry_17_O_CYMUXFAST
    );
  flagofdetect_1_cry_17_O_CYAND_105 : X_AND2
    port map (
      I0 => flagofdetect_1_cry_17_O_CYSELG,
      I1 => flagofdetect_1_cry_17_O_CYSELF,
      O => flagofdetect_1_cry_17_O_CYAND
    );
  flagofdetect_1_cry_17_O_FASTCARRY_106 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => flagofdetect_1_cry_15_O,
      O => flagofdetect_1_cry_17_O_FASTCARRY
    );
  flagofdetect_1_cry_17_O_COUTUSED : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => flagofdetect_1_cry_17_O_CYMUXFAST,
      O => flagofdetect_1_cry_17_O
    );
  flagofdetect_1_cry_17_O_CYSELF_107 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => N_118_i,
      O => flagofdetect_1_cry_17_O_CYSELF
    );
  flagofdetect_1_cry_17_O_CYMUXF2_108 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_17_O_LOGIC_ONE,
      IB => flagofdetect_1_cry_17_O_LOGIC_ONE,
      SEL => flagofdetect_1_cry_17_O_CYSELF,
      O => flagofdetect_1_cry_17_O_CYMUXF2
    );
  flagofdetect_1_cry_17_O_LOGIC_ONE_109 : X_ONE
    port map (
      O => flagofdetect_1_cry_17_O_LOGIC_ONE
    );
  flagofdetect_1_cry_19_O_CYSELG_110 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => N_121_i,
      O => flagofdetect_1_cry_19_O_CYSELG
    );
  flagofdetect_1_cry_19_O_CYMUXG2_111 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_19_O_LOGIC_ONE,
      IB => flagofdetect_1_cry_19_O_CYMUXF2,
      SEL => flagofdetect_1_cry_19_O_CYSELG,
      O => flagofdetect_1_cry_19_O_CYMUXG2
    );
  flagofdetect_1_cry_19_O_CYMUXFAST_112 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_19_O_CYMUXG2,
      IB => flagofdetect_1_cry_19_O_FASTCARRY,
      SEL => flagofdetect_1_cry_19_O_CYAND,
      O => flagofdetect_1_cry_19_O_CYMUXFAST
    );
  flagofdetect_1_cry_19_O_CYAND_113 : X_AND2
    port map (
      I0 => flagofdetect_1_cry_19_O_CYSELG,
      I1 => flagofdetect_1_cry_19_O_CYSELF,
      O => flagofdetect_1_cry_19_O_CYAND
    );
  flagofdetect_1_cry_19_O_FASTCARRY_114 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => flagofdetect_1_cry_17_O,
      O => flagofdetect_1_cry_19_O_FASTCARRY
    );
  flagofdetect_1_cry_19_O_COUTUSED : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => flagofdetect_1_cry_19_O_CYMUXFAST,
      O => flagofdetect_1_cry_19_O
    );
  flagofdetect_1_cry_19_O_CYSELF_115 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => N_120_i,
      O => flagofdetect_1_cry_19_O_CYSELF
    );
  flagofdetect_1_cry_19_O_CYMUXF2_116 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_19_O_LOGIC_ONE,
      IB => flagofdetect_1_cry_19_O_LOGIC_ONE,
      SEL => flagofdetect_1_cry_19_O_CYSELF,
      O => flagofdetect_1_cry_19_O_CYMUXF2
    );
  flagofdetect_1_cry_19_O_LOGIC_ONE_117 : X_ONE
    port map (
      O => flagofdetect_1_cry_19_O_LOGIC_ONE
    );
  flagofdetect_1_cry_21_O_CYSELG_118 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => N_123_i,
      O => flagofdetect_1_cry_21_O_CYSELG
    );
  flagofdetect_1_cry_21_O_CYMUXG2_119 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_21_O_LOGIC_ONE,
      IB => flagofdetect_1_cry_21_O_CYMUXF2,
      SEL => flagofdetect_1_cry_21_O_CYSELG,
      O => flagofdetect_1_cry_21_O_CYMUXG2
    );
  flagofdetect_1_cry_21_O_CYMUXFAST_120 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_21_O_CYMUXG2,
      IB => flagofdetect_1_cry_21_O_FASTCARRY,
      SEL => flagofdetect_1_cry_21_O_CYAND,
      O => flagofdetect_1_cry_21_O_CYMUXFAST
    );
  flagofdetect_1_cry_21_O_CYAND_121 : X_AND2
    port map (
      I0 => flagofdetect_1_cry_21_O_CYSELG,
      I1 => flagofdetect_1_cry_21_O_CYSELF,
      O => flagofdetect_1_cry_21_O_CYAND
    );
  flagofdetect_1_cry_21_O_FASTCARRY_122 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => flagofdetect_1_cry_19_O,
      O => flagofdetect_1_cry_21_O_FASTCARRY
    );
  flagofdetect_1_cry_21_O_COUTUSED : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => flagofdetect_1_cry_21_O_CYMUXFAST,
      O => flagofdetect_1_cry_21_O
    );
  flagofdetect_1_cry_21_O_CYSELF_123 : X_BUF_PP
    generic map(
      PATHPULSE => 665 ps
    )
    port map (
      I => N_122_i,
      O => flagofdetect_1_cry_21_O_CYSELF
    );
  flagofdetect_1_cry_21_O_CYMUXF2_124 : X_MUX2
    port map (
      IA => flagofdetect_1_cry_21_O_LOGIC_ONE,
      IB => flagofdetect_1_cry_21_O_LOGIC_ONE,
      SEL