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📄 ca_code_generator.vhd

📁 VHDLfullCODEforCAcodeGenerator.rar为CA码发生器的完整VHDL程序
💻 VHD
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---- Data: 2004,8,3;

---- // Generate C/A ( Corse/Aquisition ) Code ;
---- // TapOfA , TapOfB : the parameter of Code_m2 for different C/A code;
----    ( the selection of code phase );
---- // By changing the parameters of TapOfA and TapOfB,
----    we can get all of the C/A Codes;


---- // The programme can be expanded for all the generation of Gold_Code if we parameterize:
----     1) NumOfXorTaps_LFSR1 : the Number of  Xor Taps  in LFSR1;
----     2) NumOfXorTaps_LFSR2 : the Number of  Xor Taps  in LFSR2;
----     3) LengthOfLFSR       : the Length of  LFSR;
----     For different Gold_Code, the constant ( XorTapOfLFSR1,XorTapOfLFSR2 ) should be changed;


library IEEE;
use IEEE.STD_LOGIC_1164.ALL;							
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity CA_Code_Generator is
    generic(TapOfA	   : integer := 2;
            TapOfB	   :	integer := 6
		  );
    Port ( CodeClk     : in std_logic;
           LoadOfReset : in std_logic;
           CA_Code     : out std_logic
		 );
end CA_Code_Generator;

architecture rtl of CA_Code_Generator is

  type XorTapArray_LFSR1 is array ( 2-1 downto 0) of integer;
  type XorTapArray_LFSR2 is array ( 6-1 downto 0) of integer;
  constant XorTapOfLFSR1 : XorTapArray_LFSR1 := (3-1, 10-1);  
  constant XorTapOfLFSR2 : XorTapArray_LFSR2 := (2-1,  3-1, 6-1, 8-1, 9-1, 10-1);  

  ----- 0 1 2 3 4 5 6 7 8 9 -------
  signal SRL_LFSR1	     : std_logic_vector( 0 to 9); 
  signal Par_LFSR1       : std_logic_vector( 2-1-1 downto 0); 
  signal Code_m1         : std_logic;				  
				    
  signal SRL_LFSR2	     : std_logic_vector( 0 to 9);     
  signal Par_LFSR2       : std_logic_vector( 6-1-1 downto 0);  
  signal Code_m2         : std_logic;
  	
begin

---------------------------------------------------
-------//////////// LFSR1 ////////////// ----------
---------------------------------------------------
  	  ShiftOfLFSR1 : process(CodeClk,LoadOfReset)
  begin
    if  LoadOfReset = '0' then
        SRL_LFSR1 <= (others=>'1');
    elsif CodeClk'event and CodeClk = '1' then
	        SRL_LFSR1 <= Par_LFSR1(Par_LFSR1'high) & SRL_LFSR1( 0 to SRL_LFSR1'right-1);
    end if;
  end process;
 

  GenerateParityOfLFSR1: 
  for X in 0 to 2-1-1 generate  
    FirstGenerate:
    if  X = 0 generate
        Par_LFSR1(0) <= SRL_LFSR1(XorTapOfLFSR1(0)) xor SRL_LFSR1(XorTapOfLFSR1(1));
    end generate;
    OtherGenerate:
    if  X >= 1 and X <= 2-1-1 generate
        Par_LFSR1(X) <= Par_LFSR1(X-1) xor SRL_LFSR1(XorTapOfLFSR1(X+1));
    end generate;
  end generate;
  


  GenerateCode_m1:
  Code_m1 <= SRL_LFSR1(SRL_LFSR1'right);  

---------------------------------------------------
-------//////////// LFSR2 ////////////// ----------
---------------------------------------------------
 ShiftOfLFSR2 : process(CodeClk,LoadOfReset)
  begin
    if  LoadOfReset = '0' then
        SRL_LFSR2 <= (others=>'1');
    elsif CodeClk'event and CodeClk = '1' then
	        SRL_LFSR2 <= Par_LFSR2(Par_LFSR2'high) & SRL_LFSR2( 0 to SRL_LFSR2'right-1);
    end if;
  end process;

  
  GenerateParityOfLFSR2: 
  for X in 0 to 6-1-1 generate
    FirstGenerate:
    if  X = 0 generate
        Par_LFSR2(0) <= SRL_LFSR2(XorTapOfLFSR2(0)) xor SRL_LFSR2(XorTapOfLFSR2(1));
    end generate;
    OtherGenerate:
    if  X >= 1 and X <= 6-1-1  generate
        Par_LFSR2(X) <= Par_LFSR2(X-1) xor SRL_LFSR2(XorTapOfLFSR2(X+1));
    end generate;
  end generate;

  
  GenerateCode_m2:  ----  PahseOfSelect;
  Code_m2 <= SRL_LFSR2(TapOfA-1) xor SRL_LFSR2(TapOfB-1);

---------------------------------------------------
-------//////////// GenerateGoldCode ////////////// 
---------------------------------------------------

  GoldCodeOutput:
    
  CA_Code <= Code_m1 xor Code_m2; 

end rtl;




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