lwip_main.c

ADS下基于AT91SAM7X256-EK的可以运行的uCOS-II源码

#include "lwip/opt.h"
#include "lwip/mem.h"
#include "lwip/memp.h"
#include "lwip/sys.h"
#include "lwip/stats.h"
#include "lwip/tcpip.h"
#include "netif/loopif.h"
#include "lwip/ip_addr.h"
#include "lwip/debug.h"

#include "tcpecho.h"
#include "udpecho.h"
#include "httpd.h"

#include "AT91SAM7X256.h"
#include "lib_AT91SAM7X256.h"
#include "board.h"
#include "bsp.h"

#include "mii.h"
#include "Emac.h"
#include "LWIP_main.h"

#define EMAC_IRQ
//#define RMII

/*--------------------------------------------------------------------*/
static void tcpip_init_done(void *arg)
{
	sys_sem_t *sem;
	sem = arg;
	sys_sem_signal(*sem);
}

/*--------------------------------------------------------------------*/
/*--------------------------------------------------------------------*/
void LWIP_main(void *arg)
{
	u8_t	err;
  	struct ip_addr ipaddr, netmask, gw;
  	sys_sem_t sem;
	struct netif *netif_test;

  	netifnum = 0; //for count netif->num
  
#ifdef STATS
  	stats_init();
#endif /* STATS */
	

  	sys_init();
  	mem_init();
  	memp_init();
  	pbuf_init();

	OSSemPend(ConsoleSem,0,&err);
	uprintf("\n\r=============System initialized.================");
	OSSemPost(ConsoleSem);

//mainthread
  	netif_init();						//netif_list = netif_default = NULL;
  	//sem = sys_sem_new(0);
  	//tcpip_init(tcpip_init_done, &sem);
  	tcpip_init(NULL,NULL);
  	//sys_sem_wait(sem);
  	//sys_sem_free(sem);  
 
	OSSemPend(ConsoleSem,0,&err);
  	uprintf("\n\r=============TCP/IP initialized.================");
  	OSSemPost(ConsoleSem);

#if LWIP_DHCP
  	{
    	struct netif *netif;
    	IP4_ADDR(&gw, 0,0,0,0);
    	IP4_ADDR(&ipaddr, 0,0,0,0);
    	IP4_ADDR(&netmask, 0,0,0,0);

    	netif = netif_add(&ipaddr, &netmask, &gw, ethernetif_init,
		      tcpip_input);
    	netif_set_default(netif);
    	dhcp_init();
    	dhcp_start(netif);
  	}
#else

	//add ne2k interface
  	IP4_ADDR(&gw, GATEWAY1,GATEWAY2,GATEWAY3,GATEWAY4);
  	IP4_ADDR(&ipaddr, OURIP1,OURIP2,OURIP3,OURIP4);
  	IP4_ADDR(&netmask, NETMASK1,NETMASK2,NETMASK3,NETMASK4);
  
  	netif_test = netif_add(&ipaddr, &netmask, &gw, NULL, ethernetif_init,tcpip_input);
  
  	if(netif_test == NULL){
  		//OSSemPend(ConsoleSem,0,&err);
  		uprintf("\n\r err in netif_add function!!!");
  		//OSSemPost(ConsoleSem);
  	}
  	else{
    	netif_set_default(netif_test);
  	}
 
	OSSemPend(ConsoleSem,0,&err);
  	uprintf("\n\r=============Net Interface Attached=============");
  	uprintf("\n\r===============IP: %d.%d.%d.%d================", OurIpAddr[0], OurIpAddr[1], OurIpAddr[2],OurIpAddr[3]);
  	uprintf("\n\r==========MAC: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x==========", OurEmacAddr[0],OurEmacAddr[1],OurEmacAddr[2],OurEmacAddr[3],OurEmacAddr[4],OurEmacAddr[5]);
  	OSSemPost(ConsoleSem);

#endif

  	OSSemPend(ConsoleSem,0,&err);
  	uprintf("\n\rApplications started.");
  	OSSemPost(ConsoleSem);

}

/*-----------------------------------------------------------------------------------*/

//*----------------------------------------------------------------------------
//* \fn    Emacmain
//* \brief
//*
//*----------------------------------------------------------------------------
void Emacmain(void *arg)
{
  	int status=0;
#ifndef RMII
  	int control=0;
#endif

	//  AT91S_IPheader IpHeader;
  	AT91PS_PIO     pPIOB = AT91C_BASE_PIOB;	
  	AT91PS_EMAC    pEMAC = AT91C_BASE_EMAC;	
  	AT91PS_RSTC    pRSTC = AT91C_BASE_RSTC;
  
  	AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1 << AT91C_ID_PIOA ) ;
  	AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1 << AT91C_ID_PIOB ) ;
  	AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1 << AT91C_ID_EMAC ) ;

  	arg = arg;
  	
  	//disable pull up on RXDV => PHY normal mode (not in test mode),
  	//PHY has internal pull down
  	pPIOB->PIO_PPUDR=1<<15;


#ifndef RMII
  	//PHY has internal pull down : set MII mode
  	pPIOB->PIO_PPUDR=1<<16;
#endif

  	//clear PB18 <=> PHY powerdown
  	AT91F_PIO_CfgOutput( AT91C_BASE_PIOB, 1<<18 ) ;
  	AT91F_PIO_ClearOutput( AT91C_BASE_PIOB,  1<<18) ;

  	//After PHY power up, hardware reset
  	pRSTC->RSTC_RMR = 0xA5000000 | AT91C_RSTC_ERSTL&(0x01<<8);
  	pRSTC->RSTC_RCR = 0xA5000000 | AT91C_RSTC_EXTRST;
		
  	//Wait for hardware reset end
 	while( !(pRSTC->RSTC_RSR & AT91C_RSTC_NRSTL) ) {;}	
  	//EMAC IO init for EMAC-PHY com
  	// Remove EF100 config
  	AT91F_PIO_CfgPeriph(
              AT91C_BASE_PIOB, // PIO controller base address
              ((unsigned int) AT91C_PB2_ETX0    ) |
              ((unsigned int) AT91C_PB12_ETXER   ) |
              ((unsigned int) AT91C_PB16_ECOL    ) |
              ((unsigned int) AT91C_PB11_ETX3    ) |
              ((unsigned int) AT91C_PB6_ERX1    ) |
              ((unsigned int) AT91C_PB15_ERXDV_ECRSDV   ) |
              ((unsigned int) AT91C_PB13_ERX2    ) |
              ((unsigned int) AT91C_PB3_ETX1    ) |
              ((unsigned int) AT91C_PB8_EMDC    ) |
              ((unsigned int) AT91C_PB5_ERX0    ) |
              ((unsigned int) AT91C_PB14_ERX3    ) |
              ((unsigned int) AT91C_PB4_ECRS) |
              ((unsigned int) AT91C_PB1_ETXEN   ) |
              ((unsigned int) AT91C_PB10_ETX2    ) |
              ((unsigned int) AT91C_PB0_ETXCK_EREFCK) |
              ((unsigned int) AT91C_PB9_EMDIO   ) |
              ((unsigned int) AT91C_PB7_ERXER   ) |
              ((unsigned int) AT91C_PB17_ERXCK   ),
              0);

  	//Enable com between EMAC PHY
  	AT91F_Enable_Mdi(pEMAC);
  	//PHY configuration
#ifndef RMII
  	//PHY has internal pull down : disable MII isolate
  	read_phy(pEMAC, AT91C_PHY_ADDR, MII_BMCR, (unsigned int *)&control);
  	read_phy(pEMAC, AT91C_PHY_ADDR, MII_BMCR, (unsigned int *)&control);
  	control &= ~BMCR_ISOLATE;
  	write_phy(pEMAC, AT91C_PHY_ADDR, MII_BMCR, control);
#endif
  
  	// Wait for PHY auto negotiation completed
  	do {
    	read_phy(pEMAC, AT91C_PHY_ADDR, MII_BMSR, (unsigned int *)&status);
		read_phy(pEMAC, AT91C_PHY_ADDR, MII_BMSR, (unsigned int *)&status);
  	}
  	while (!(status & BMSR_ANEGCOMPLETE));
  
  	AT91F_Disable_Mdi(pEMAC);
 
#ifdef RMII
  	//Enable EMAC in RMII mode, enable RMII clock (50MHz from oscillator on ERFCK)
  	pEMAC->EMAC_USRIO= AT91C_EMAC_RMII | AT91C_EMAC_CLKEN ;
#else
  	//Enable EMAC in MII mode, enable clock ERXCK and ETXCK
  	pEMAC->EMAC_USRIO= AT91C_EMAC_CLKEN ;
#endif
}