nand_read.c

s3c2440 nboot启动源码 SDRAM=64M flash=NAND flash 64M

/* 
 * vivi/s3c2410/nand_read.c: Simple NAND read functions for booting from NAND
 *
 * Copyright (C) 2002 MIZI Research, Inc.
 *
 * Author: Hwang, Chideok <[e-mail]>
 * Date  : $Date: 2004/02/04 10:37:37 $
 *
 * $Revision: 1.1.1.1 $
 * $Id: param.c,v 1.9 2002/07/11 06:17:20 nandy Exp 
 *
 * History
 *
 */

//#include <config.h>
#include "2440addr.h"
#define U32 unsigned int
#define U16 unsigned short
#define S32 int
#define S16 short int
#define U8  unsigned char
#define	S8  char

#define TRUE 	1   
#define FALSE 	0


#define NF_MECC_UnLock()         {rNFCONT&=~(1<<5);}
#define NF_MECC_Lock()         {rNFCONT|=(1<<5);}

#define NF_CMD(cmd)			{rNFCMD=cmd;}
#define NF_ADDR(addr)		{rNFADDR=addr;}	
#define NF_nFCE_L()			{rNFCONT&=~(1<<1);}
#define NF_nFCE_H()			{rNFCONT|=(1<<1);}
#define NF_RSTECC()			{rNFCONT|=(1<<4);}
#define NF_RDDATA() 		(rNFDATA)
#define NF_RDDATA8() 		((*(volatile unsigned char*)0x4E000010) )

#define NF_WRDATA(data) 	{rNFDATA=data;}

#define NF_WAITRB()    		{while(!(rNFSTAT&(1<<1)));} 
	   						 //wait tWB and check F_RNB pin.
// RnB Signal
#define NF_CLEAR_RB()    		{rNFSTAT |= (1<<2);}	// Have write '1' to clear this bit.
#define NF_DETECT_RB()    		{while(!(rNFSTAT&(1<<2)));}

#define ID_K9S1208V0M	0xec76
#define ID_K9K2G16U0M	0xecca

#define	NF16_BAD_OFFSET		(12)


#define __REGb(x)	(*(volatile unsigned char *)(x))
#define __REGi(x)	(*(volatile unsigned int *)(x))
#define NF_BASE		0x4e000000

#define NFCONF		__REGi(NF_BASE + 0x0)
#define NFCONT		__REGi(NF_BASE + 0x4)
#define NFCMD		__REGb(NF_BASE + 0x8)
#define NFADDR		__REGb(NF_BASE + 0xC)
#define NFDATA		__REGb(NF_BASE + 0x10)
#define NFSTAT		__REGb(NF_BASE + 0x20)



#define NAND_CHIP_ENABLE  (NFCONT &= ~(1<<1))
#define NAND_CHIP_DISABLE (NFCONT |=  (1<<1))
#define NAND_CLEAR_RB	  (NFSTAT |=  (1<<2))
#define NAND_DETECT_RB	  { while(! (NFSTAT&(1<<2)) );}

#define BUSY 4
#define NF_BASE		0x4e000000
#define nflash      0x14000
#define winceboot   0x20000
#define rambuf    (*(volatile unsigned char *)0x30100000) //Port G control

#define TACLS		0  //1clk(0ns) 
#define TWRPH0		3  //3clk(25ns)
#define TWRPH1		0  //1clk(10ns)  //TACLS+TWRPH0+TWRPH1>=50ns

void wait_idle(void) {
    int i;

    while(!(rNFSTAT & BUSY))
      for(i=0; i<10; i++);
}

#define NAND_SECTOR_SIZE	512
#define NAND_BLOCK_MASK		(NAND_SECTOR_SIZE - 1)
extern void pcjmp(void);
 unsigned char *buff;
//int rNFCONF;
void Nand_Reset(void)
{
    int i;
   
	NF_nFCE_L();

	NF_CLEAR_RB();
	NF_CMD(0xFF);	//reset command
	NF_DETECT_RB();
	
	NF_nFCE_H();

}
void NF8_Init(void)
{

	rNFCONF = (TACLS<<12)|(TWRPH0<<8)|(TWRPH1<<4)|(0<<0);	

	rNFCONT = (0<<13)|(0<<12)|(0<<10)|(0<<9)|(0<<8)|(0<<6)|(0<<5)|(1<<4)|(1<<1)|(1<<0);

	rNFSTAT = 0;
    
    Nand_Reset();
}
/* low level nand read function */
int nand_read_ll(unsigned char *buf, unsigned long start_addr, int size,int jumpaddr)
{
   int i, j;

	if ((start_addr & NAND_BLOCK_MASK) || (size & NAND_BLOCK_MASK)) {
		return -1;	/* invalid alignment */
	}

	NAND_CHIP_ENABLE;

	for(i=start_addr; i < (start_addr + size);) {
		/* READ0 */
		NAND_CLEAR_RB;	    
		NFCMD = 0;

		/* Write Address */
		NFADDR = i & 0xff;
		NFADDR = (i >> 9) & 0xff;
		NFADDR = (i >> 17) & 0xff;
		NFADDR = (i >> 25) & 0xff;

		NAND_DETECT_RB;

		for(j=0; j < NAND_SECTOR_SIZE; j++, i++) {
			*buf = (NFDATA & 0xff);
			buf++;
		}
	}
	NAND_CHIP_DISABLE;
	Launch(jumpaddr);
	return 0;
    
}
void Main()
{
NF8_Init();
buff=( unsigned char *)0x31ff0000;
nand_read_ll(buff,nflash,0x100000,0x31ff0000);//nflash 为nfalash读取得地址 buf 为ram的地址 如 0x14000 为第5块 每块大小为 0x4000 0x31ff0000为跳转的地址

}