cstartup.s

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;- File name	: CStartup.s
;- Author		: Sunpan
;- Date			: 2006-3
;- Function		: Startup Atmel40008 and copy all data from flash to ram.
;- Remark		: For ADS 1.2 and AXD
;- Attention	: only DEFINE RO_BASE = 0
;-					change to SVC mode with enable all interrupt
;-					not init statck for usr/system mode
;- Modify		:
;-

	INCLUDE		include/AT91R40008.inc
	INCLUDE		include/ARM7TDMI.inc

;- Get the start Ram address and size

	IF  :DEF: FLASH								; if we startup from flash
START_RAM_BASE		EQU		(0x00300000)
START_FLASH_BASE	EQU		(0x00000000)
REMAP_FLASH_BASE	EQU		(0x01000000)
	ELSE										; if we startup from ram by ICE
START_RAM_BASE		EQU		(0x00000000)
	ENDIF

REMAP_RAM_BASE		EQU		(0x00000000)
RAM_SIZE			EQU		(0x00040000)		; Unit: bytes, 256K
FLASH_SIZE			EQU		(0x00200000)		; Unit: bytes, 2M
;------------------------------------------------------------------------------
;- Area Definition
;------------------------------------------------------------------------------
	AREA	reset, CODE, READONLY
												; MUST set section name = "reset"
												; because of ARM Linker configer
	ENTRY										; ONLY one ENTRY in a project
	EXPORT	entry								; tell arm compiler what "entry" is

;------------------------------------------------------------------------------
;- Exception vectors ( before Remap )
;------------------------------------
;- These vectors can be read at address 0, no matter in RAM or Flash.
;- We call this vectors OLD vectors which is only used before remap.
;- After remap, this vectors will be overload by the NEW/REAL vectors.
;- Except the first instruction, the others EQU "B ."
;------------------------------------------------------------------------------

entry
	B		InitReset							; Reset handler
undefvec
	B		undefvec							; Undefined Instruction <=>B .
swivec
	B		swivec								; Software Interrupt
pabtvec
	B		pabtvec								; Prefetch Abort
dabtvec
	B		dabtvec								; Data Abort
rsvdvec
	B		rsvdvec								; reserved
irqvec
	B		irqvec								; IRQ
fiqvec
	B		fiqvec								; FIQ

;------------------------------------------------------------------------------
;- Exception vectors ( after copy vectors )
;------------------------------------------
;- These vectors will be copied to 0x00 in RAM, no matter the startup method.
;- Because the address of these vectors will be changed, we only can use
;- RELATIVE address. In fact, if we know the reason clearly, we also can use
;- ABSOLUTE address. In this section, we use RELATIVE address instead of computing
;- the real ABSOLUTE address.
;------------------------------------------------------------------------------

	EXPORT	VectorTable
	IMPORT	SoftReset
	IMPORT	UndefHandler
	IMPORT	SWIHandler
	IMPORT	PrefetchAbortHandler
	IMPORT	DataAbortHandler

VectorTable
	LDR		PC, [PC, #&18]						; SoftReset
	LDR		PC, [PC, #&18]						; UndefHandler
	LDR		PC, [PC, #&18]						; SWIHandler
	LDR		PC, [PC, #&18]						; PrefetchAbortHandler
	LDR		PC, [PC, #&18]						; DataAbortHandler
	nop											; Reserved
	LDR		PC, [PC,#-0xF20]					; IRQ : read the AIC
	LDR		PC, [PC,#-0xF20]					; FIQ : read the AIC

;- There are only 5 offsets as the vectoring is used.

	DCD		SoftReset
	DCD		UndefHandler
	DCD		SWIHandler
	DCD		PrefetchAbortHandler
	DCD		DataAbortHandler

;------------------------------------------------------------------------------
;- Step1. Call C initialization to init hardware
;- Before we call the c function, we will use temperary statck memory(Only in RAM)
;- to backup necessary registers. So, we must define the temperary statck
;- address according to the startup method.
;------------------------------------------------------------------------------

	;IMPORT	config_led							; For debug
	;IMPORT	led_on								; For debug
	;IMPORT	led_off								; For debug

	IMPORT	AT91F_Init_EBI
	IMPORT	AT91F_Init_AIC
	IMPORT	AT91F_CopyCode2Ram
	IMPORT	AT91F_CopyVector2Ram

TEMP_STACK	EQU (START_RAM_BASE + RAM_SIZE)		; top of ram

InitReset

	LDR		R13, =TEMP_STACK					; temporary stack in internal Ram

	BL		AT91F_Init_EBI
	BL		AT91F_Init_AIC

	;BL		config_led							; For debug

;------------------------------------------------------------------------------
;- Step2. Call C initialization to copy OLD code(ram/flash) to NEW code and
;- copy OLD vector to NEW vector.
;------------------------------------------------------------------------------

	IF  :DEF: FLASH
	BL		AT91F_CopyCode2Ram
	ENDIF

	;BL		led_on								; For debug

	LDR		R1, =START_RAM_BASE					; parameter 2 for the function
	ADD     R0, PC, #-(8+.-VectorTable)			; @ where to read values (relative,why???)
	BL		AT91F_CopyVector2Ram

	;BL		led_off								; For debug

;------------------------------------------------------------------------------
;- Step3. Remap
;------------------------------------------------------------------------------

	;BNE		.								; For debug

	MOV		R1, #AT91C_EBI_RCB					; Get the REMAP value
	str		R1, [r0]							; Store the complete image with the remap command

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;- USE START_RAM_BASE & START_FLASH_BASE
;------------------------------------------------------------------------------
;- USE REMAP_RAM_BASE & REMAP_FLASH_BASE
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

;------------------------------------------------------------------------------
;- Step4. Setup the stack for each mode except usr/system mode because we do not
;- use it. Only update control domain of each mode with enable all interrupt.
;------------------------------------------------------------------------------
IRQ_STACK_SIZE		EQU		(16*8*4)			; 16 words per interrupt priority level
FIQ_STACK_SIZE		EQU		(16*4)				; 16 words
ABT_STACK_SIZE		EQU		(16*4)				; 16 words
UND_STACK_SIZE		EQU		(16*4)				; 16 words
;SVC_STACK_SIZE		EQU		(16*4)				; 16 words, not use this mode

TOP_STACK			EQU		(REMAP_RAM_BASE + RAM_SIZE)		; top of ram

;- Set up Fast Interrupt Mode and set FIQ Mode Stack
	LDR		R0, =TOP_STACK
	MSR     CPSR_c, #(ARM_MODE_FIQ | NO_INT)
	MOV		R13, R0								; Init stack FIQ

;- Set up Interrupt Mode and set IRQ Mode Stack
	SUB		R0, R0, #FIQ_STACK_SIZE
	MSR     CPSR_c, #(ARM_MODE_IRQ | NO_INT)
	MOV		R13, R0								; Init stack IRQ

;- Set up Abort Mode and set Abort Mode Stack
	SUB		R0, R0, #IRQ_STACK_SIZE
	MSR     CPSR_c, #(ARM_MODE_ABORT | NO_INT)
	MOV		R13, R0								; Init stack Abort

;- Set up Undefined Instruction Mode and set Undef Mode Stack
	SUB		R0, R0, #ABT_STACK_SIZE
	MSR     CPSR_c, #(ARM_MODE_UNDEF | NO_INT)
	MOV		R13, R0								; Init stack Abort

;- Set up Supervisor Mode and set Supervisor Mode Stack
	SUB		R0, R0, #UND_STACK_SIZE
	MSR     CPSR_c, #(ARM_MODE_SVC | NO_INT)
	MOV		R13, R0								; Init stack Abort


	;BL		led_on								; For debug

;------------------------------------------------------------------------------
;- Step5: Branch on C code Main function
;------------------------------------------------------------------------------
	IMPORT	main

	LDR		R0, =main
	MOV		LR, PC
	BX		R0

	END