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📄 de2_top.fit.qmsg

📁 一个经过DE2板验证的数字移相信号发生器的HDL原代码!曾经能够获奖的,工程设计的好东西!
💻 QMSG
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{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:2:IRF\|Q\[0\]  " "Info: Automatically promoted node sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:2:IRF\|Q\[0\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|is_in_use_reg~6 " "Info: Destination node dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|is_in_use_reg~6" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_mod_ram_rom.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_mod_ram_rom.vhd" 708 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|is_in_use_reg~6" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst9|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg~6 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst9|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg~6 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0 " "Info: Destination node dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0" {  } { { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst9|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process4~0 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst9|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process4~0 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|hub_tdo~1087 " "Info: Destination node sld_hub:sld_hub_inst\|hub_tdo~1087" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" 135 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|hub_tdo~1087" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|hub_tdo~1087 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|hub_tdo~1087 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "c:/altera/quartus60/libraries/megafunctions/sld_dffex.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_dffex.vhd" 19 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:2:IRF\|Q\[0\]" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[0] } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[0] } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|offload_shift_ena  " "Info: Automatically promoted node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|offload_shift_ena " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|ram_shift_load " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|ram_shift_load" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_acquisition_buffer.vhd" 406 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|ram_shift_load" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "c:/altera/quartus60/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_acquisition_buffer.vhd" 402 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|offload_shift_ena" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|offload_shift_ena } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|offload_shift_ena } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0  " "Info: Automatically promoted node dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0}  } { { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst8|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process4~0 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst8|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process4~0 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0  " "Info: Automatically promoted node dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0}  } { { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst9|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process4~0 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst9|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process4~0 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[3\]  " "Info: Automatically promoted node sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[3\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process1~1 " "Info: Destination node dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process1~1" {  } { { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process1~1" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst8|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~1 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst8|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~1 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process0~12 " "Info: Destination node dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process0~12" {  } { { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process0~12" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst8|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process0~12 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst8|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process0~12 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~25 " "Info: Destination node dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~25" {  } { { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~25" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst8|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process4~25 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst8|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process4~25 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_reg\[6\]~1112 " "Info: Destination node dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_reg\[6\]~1112" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_mod_ram_rom.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_mod_ram_rom.vhd" 413 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_reg\[6\]~1112" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst8|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]~1112 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst8|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]~1112 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "c:/altera/quartus60/libraries/megafunctions/sld_dffex.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_dffex.vhd" 19 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[3\]" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[3] } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[3] } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:2:IRF\|Q\[3\]  " "Info: Automatically promoted node sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:2:IRF\|Q\[3\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process1~1 " "Info: Destination node dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process1~1" {  } { { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process1~1" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst9|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~1 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst9|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~1 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process0~11 " "Info: Destination node dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process0~11" {  } { { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process0~11" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst9|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process0~11 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst9|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process0~11 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~13 " "Info: Destination node dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~13" {  } { { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~13" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst9|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process4~13 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst9|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process4~13 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_reg\[6\]~1112 " "Info: Destination node dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_reg\[6\]~1112" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_mod_ram_rom.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_mod_ram_rom.vhd" 413 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "dds:u1\|sinrom:b2v_inst9\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_reg\[6\]~1112" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst9|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]~1112 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst9|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]~1112 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "c:/altera/quartus60/libraries/megafunctions/sld_dffex.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_dffex.vhd" 19 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:2:IRF\|Q\[3\]" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[3] } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[3] } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:3:IRF\|Q\[1\]  " "Info: Automatically promoted node sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:3:IRF\|Q\[1\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out\[2\] " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out\[2\]" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1242 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out\[2\]" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[2] } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[2] } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|ela_status~132 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|ela_status~132" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 451 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|ela_status~132" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|ela_status~132 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|ela_status~132 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~62 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~62" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1193 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~62" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~62 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~62 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|post_trigger_count_enable~33 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|post_trigger_count_enable~33" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1079 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|post_trigger_count_enable~33" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable~33 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable~33 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|edq~89 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|edq~89" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1119 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|edq~89" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|edq~89 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|edq~89 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_segment_mgr:\\gen_non_zero_sample_depth_segment:seg_mgr\|segment_write_addr_adv_ena~52 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_segment_mgr:\\gen_non_zero_sample_depth_segment:seg_mgr\|segment_write_addr_adv_ena~52" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1491 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_segment_mgr:\\gen_non_zero_sample_depth_segment:seg_mgr\|segment_write_addr_adv_ena~52" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|segment_write_addr_adv_ena~52 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|segment_write_addr_adv_ena~52 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset~23 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset~23" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_acquisition_buffer.vhd" 417 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset~23" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~23 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~23 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "c:/altera/quartus60/libraries/megafunctions/sld_dffex.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_dffex.vhd" 19 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:3:IRF\|Q\[1\]" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:3:IRF|Q[1] } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:3:IRF|Q[1] } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0}

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