de2_top.fit.qmsg

一个经过DE2板验证的数字移相信号发生器的HDL原代码!曾经能够获奖的,工程设计的好东西!

{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "CLOCK_50 (placed in PIN N2 (CLK0, LVDSCLK0p, Input)) " "Info: Automatically promoted node CLOCK_50 (placed in PIN N2 (CLK0, LVDSCLK0p, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G2 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G2" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0}  } { { "DE2_TOP.v" "" { Text "F:/dds/dds/DE2_Top/DE2_TOP.v" 176 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "CLOCK_50" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLOCK_50 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { CLOCK_50 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "altera_internal_jtag~TCKUTAP  " "Info: Automatically promoted node altera_internal_jtag~TCKUTAP " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0}  } { { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "altera_internal_jtag~TDO" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_signaltap:auto_signaltap_0\|reset_all  " "Info: Automatically promoted node sld_signaltap:auto_signaltap_0\|reset_all " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_acquisition_buffer.vhd" 417 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "c:/altera/quartus60/libraries/megafunctions/sld_signaltap.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_signaltap.vhd" 426 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|reset_all" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|reset_all } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|reset_all } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|CLR_SIGNAL  " "Info: Automatically promoted node sld_hub:sld_hub_inst\|CLR_SIGNAL " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|reset_all " "Info: Destination node sld_signaltap:auto_signaltap_0\|reset_all" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_signaltap.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_signaltap.vhd" 426 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|reset_all" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|reset_all } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|reset_all } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|gen_non_zero_sample_depth~0 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|gen_non_zero_sample_depth~0" {  } { { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|gen_non_zero_sample_depth~0" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|gen_non_zero_sample_depth~0 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|gen_non_zero_sample_depth~0 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "c:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" 316 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|CLR_SIGNAL" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|CLR_SIGNAL } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|CLR_SIGNAL } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\]  " "Info: Automatically promoted node sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~473 " "Info: Destination node sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~473" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" 1135 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~473" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~473 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~473 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~5 " "Info: Destination node sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~5" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" 1135 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~5" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~5 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~5 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "c:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" 1150 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\]" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|gen_non_zero_sample_depth~0  " "Info: Automatically promoted node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|gen_non_zero_sample_depth~0 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0}  } { { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|gen_non_zero_sample_depth~0" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|gen_non_zero_sample_depth~0 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|gen_non_zero_sample_depth~0 } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset  " "Info: Automatically promoted node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0}  } { { "c:/altera/quartus60/libraries/megafunctions/sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_acquisition_buffer.vhd" 417 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[0\]  " "Info: Automatically promoted node sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[0\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0 0 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|hub_tdo~1080 " "Info: Destination node sld_hub:sld_hub_inst\|hub_tdo~1080" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" 135 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|hub_tdo~1080" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|hub_tdo~1080 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|hub_tdo~1080 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|is_in_use_reg~6 " "Info: Destination node dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|is_in_use_reg~6" {  } { { "c:/altera/quartus60/libraries/megafunctions/sld_mod_ram_rom.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_mod_ram_rom.vhd" 708 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|is_in_use_reg~6" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst8|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg~6 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst8|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg~6 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0 " "Info: Destination node dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0" {  } { { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "dds:u1\|sinrom:b2v_inst8\|altsyncram:altsyncram_component\|altsyncram_71a1:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst8|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process4~0 } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dds:u1|sinrom:b2v_inst8|altsyncram:altsyncram_component|altsyncram_71a1:auto_generated|sld_mod_ram_rom:mgl_prim2|process4~0 } "NODE_NAME" } }  } 0 0 "Destination node %1!s!" 0 0}  } {  } 0 0 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0}  } { { "c:/altera/quartus60/libraries/megafunctions/sld_dffex.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_dffex.vhd" 19 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[0\]" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0] } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0] } "NODE_NAME" } }  } 0 0 "Automatically promoted node %1!s! %2!s!" 0 0}