rom.vhd

一个经过DE2板验证的数字移相信号发生器的HDL原代码!曾经能够获奖的,工程设计的好东西!

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity rom is
  port (addr :in std_logic_vector(9 downto 0);
        clk : in std_logic;
        outp : out signed (8 downto 0));
end entity rom;
architecture art of rom is
begin
process(clk) is
begin
if (clk'event and clk='1') then
case addr is
when "0000000000"=>outp<="000000000";
when "0000000001"=>outp<="000000010";
when "0000000010"=>outp<="000000011";
when "0000000011"=>outp<="000000101";
when "0000000100"=>outp<="000000110";
when "0000000101"=>outp<="000001000";
when "0000000110"=>outp<="000001001";
when "0000000111"=>outp<="000001011";
when "0000001000"=>outp<="000001101";
when "0000001001"=>outp<="000001110";
when "0000001010"=>outp<="000010000";
when "1111101001"=>outp<="111011100";
when "1111101010"=>outp<="111011110";
when "1111101011"=>outp<="111011111";
when "1111101100"=>outp<="111100001";
when "1111101101"=>outp<="111100010";
when "1111101110"=>outp<="111100100";
when "1111101111"=>outp<="111100101";
when "1111110000"=>outp<="111100111";
when "1111110001"=>outp<="111101001";
when "1111110010"=>outp<="111101010";
when "1111110011"=>outp<="111101100";
when "1111110100"=>outp<="111101101";
when "1111110101"=>outp<="111101111";
when "1111110110"=>outp<="111110000";
when "1111110111"=>outp<="111110010";
when "1111111000"=>outp<="111110011";
when "1111111001"=>outp<="111110101";
when "1111111010"=>outp<="111110111";
when "1111111011"=>outp<="111111010";
when "1111111100"=>outp<="111111011";
when "1111111101"=>outp<="111111101";
when "1111111110"=>outp<="111111110";
when "1111111111"=>outp<="000000000";
when others=>outp<="000000000";
end case;
end if;
end process;
end architecture art;