x225_dif.h

for mips adm5120 uclibc-0.9.19 toolchain

/*
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2002 ATI Technologies, Inc.
 *
 */

/* REGISTER:  TIMER_CONT_REG0 */

#define X225_TIMER_CONT_REG0__SIZE                                        32
#define X225_TIMER_CONT_REG0__BYTELANE                                    0
#define X225_TIMER_CONT_REG0__WRMASK                                      0x0003ffff
#define X225_TIMER_CONT_REG0__RDMASK                                      0x00000000
#define X225_TIMER_CONT_REG0__WOMASK                                      0x0003ffff

#define mmX225_TIMER_CONT_REG0                                            0x2900

#define X225_TIMER_CONT_REG0__TIMER0_RESET__SIZE                          1
#define X225_TIMER_CONT_REG0__TIMER0_RESET__MASK                          0x00000001
#define X225_TIMER_CONT_REG0__TIMER0_RESET__SHIFT                         0
#define X225_TIMER_CONT_REG0__TIMER1_RESET__SIZE                          1
#define X225_TIMER_CONT_REG0__TIMER1_RESET__MASK                          0x00000002
#define X225_TIMER_CONT_REG0__TIMER1_RESET__SHIFT                         1
#define X225_TIMER_CONT_REG0__TIMER2_RESET__SIZE                          1
#define X225_TIMER_CONT_REG0__TIMER2_RESET__MASK                          0x00000004
#define X225_TIMER_CONT_REG0__TIMER2_RESET__SHIFT                         2
#define X225_TIMER_CONT_REG0__TIMER3_RESET__SIZE                          1
#define X225_TIMER_CONT_REG0__TIMER3_RESET__MASK                          0x00000008
#define X225_TIMER_CONT_REG0__TIMER3_RESET__SHIFT                         3
#define X225_TIMER_CONT_REG0__TIMER4_RESET__SIZE                          1
#define X225_TIMER_CONT_REG0__TIMER4_RESET__MASK                          0x00000010
#define X225_TIMER_CONT_REG0__TIMER4_RESET__SHIFT                         4
#define X225_TIMER_CONT_REG0__TIMER5_RESET__SIZE                          1
#define X225_TIMER_CONT_REG0__TIMER5_RESET__MASK                          0x00000020
#define X225_TIMER_CONT_REG0__TIMER5_RESET__SHIFT                         5
#define X225_TIMER_CONT_REG0__TIMER0_INTRR_CLEAR__SIZE                    1
#define X225_TIMER_CONT_REG0__TIMER0_INTRR_CLEAR__MASK                    0x00000040
#define X225_TIMER_CONT_REG0__TIMER0_INTRR_CLEAR__SHIFT                   6
#define X225_TIMER_CONT_REG0__TIMER1_INTRR_CLEAR__SIZE                    1
#define X225_TIMER_CONT_REG0__TIMER1_INTRR_CLEAR__MASK                    0x00000080
#define X225_TIMER_CONT_REG0__TIMER1_INTRR_CLEAR__SHIFT                   7
#define X225_TIMER_CONT_REG0__TIMER2_INTRR_CLEAR__SIZE                    1
#define X225_TIMER_CONT_REG0__TIMER2_INTRR_CLEAR__MASK                    0x00000100
#define X225_TIMER_CONT_REG0__TIMER2_INTRR_CLEAR__SHIFT                   8
#define X225_TIMER_CONT_REG0__TIMER3_INTRR_CLEAR__SIZE                    1
#define X225_TIMER_CONT_REG0__TIMER3_INTRR_CLEAR__MASK                    0x00000200
#define X225_TIMER_CONT_REG0__TIMER3_INTRR_CLEAR__SHIFT                   9
#define X225_TIMER_CONT_REG0__TIMER4_INTRR_CLEAR__SIZE                    1
#define X225_TIMER_CONT_REG0__TIMER4_INTRR_CLEAR__MASK                    0x00000400
#define X225_TIMER_CONT_REG0__TIMER4_INTRR_CLEAR__SHIFT                   10
#define X225_TIMER_CONT_REG0__TIMER5_INTRR_CLEAR__SIZE                    1
#define X225_TIMER_CONT_REG0__TIMER5_INTRR_CLEAR__MASK                    0x00000800
#define X225_TIMER_CONT_REG0__TIMER5_INTRR_CLEAR__SHIFT                   11
#define X225_TIMER_CONT_REG0__TIMER0_RETRIGGER__SIZE                      1
#define X225_TIMER_CONT_REG0__TIMER0_RETRIGGER__MASK                      0x00001000
#define X225_TIMER_CONT_REG0__TIMER0_RETRIGGER__SHIFT                     12
#define X225_TIMER_CONT_REG0__TIMER1_RETRIGGER__SIZE                      1
#define X225_TIMER_CONT_REG0__TIMER1_RETRIGGER__MASK                      0x00002000
#define X225_TIMER_CONT_REG0__TIMER1_RETRIGGER__SHIFT                     13
#define X225_TIMER_CONT_REG0__TIMER2_RETRIGGER__SIZE                      1
#define X225_TIMER_CONT_REG0__TIMER2_RETRIGGER__MASK                      0x00004000
#define X225_TIMER_CONT_REG0__TIMER2_RETRIGGER__SHIFT                     14
#define X225_TIMER_CONT_REG0__TIMER3_RETRIGGER__SIZE                      1
#define X225_TIMER_CONT_REG0__TIMER3_RETRIGGER__MASK                      0x00008000
#define X225_TIMER_CONT_REG0__TIMER3_RETRIGGER__SHIFT                     15
#define X225_TIMER_CONT_REG0__TIMER4_RETRIGGER__SIZE                      1
#define X225_TIMER_CONT_REG0__TIMER4_RETRIGGER__MASK                      0x00010000
#define X225_TIMER_CONT_REG0__TIMER4_RETRIGGER__SHIFT                     16
#define X225_TIMER_CONT_REG0__TIMER5_RETRIGGER__SIZE                      1
#define X225_TIMER_CONT_REG0__TIMER5_RETRIGGER__MASK                      0x00020000
#define X225_TIMER_CONT_REG0__TIMER5_RETRIGGER__SHIFT                     17

/* REGISTER:  TIMER_CONT_REG1 */

#define X225_TIMER_CONT_REG1__SIZE                                        32
#define X225_TIMER_CONT_REG1__BYTELANE                                    0
#define X225_TIMER_CONT_REG1__WRMASK                                      0xffffffff
#define X225_TIMER_CONT_REG1__RDMASK                                      0xffffffff
#define X225_TIMER_CONT_REG1__WOMASK                                      0x00000000

#define mmX225_TIMER_CONT_REG1                                            0x2904

#define X225_TIMER_CONT_REG1__TIMER0_MODE__SIZE                           1
#define X225_TIMER_CONT_REG1__TIMER0_MODE__MASK                           0x00000001
#define X225_TIMER_CONT_REG1__TIMER0_MODE__SHIFT                          0
#define X225_TIMER_CONT_REG1__TIMER1_MODE__SIZE                           1
#define X225_TIMER_CONT_REG1__TIMER1_MODE__MASK                           0x00000002
#define X225_TIMER_CONT_REG1__TIMER1_MODE__SHIFT                          1
#define X225_TIMER_CONT_REG1__TIMER2_MODE__SIZE                           1
#define X225_TIMER_CONT_REG1__TIMER2_MODE__MASK                           0x00000004
#define X225_TIMER_CONT_REG1__TIMER2_MODE__SHIFT                          2
#define X225_TIMER_CONT_REG1__TIMER3_MODE__SIZE                           1
#define X225_TIMER_CONT_REG1__TIMER3_MODE__MASK                           0x00000008
#define X225_TIMER_CONT_REG1__TIMER3_MODE__SHIFT                          3
#define X225_TIMER_CONT_REG1__TIMER0_ENABLE__SIZE                         1
#define X225_TIMER_CONT_REG1__TIMER0_ENABLE__MASK                         0x00000010
#define X225_TIMER_CONT_REG1__TIMER0_ENABLE__SHIFT                        4
#define X225_TIMER_CONT_REG1__TIMER1_ENABLE__SIZE                         1
#define X225_TIMER_CONT_REG1__TIMER1_ENABLE__MASK                         0x00000020
#define X225_TIMER_CONT_REG1__TIMER1_ENABLE__SHIFT                        5
#define X225_TIMER_CONT_REG1__TIMER2_ENABLE__SIZE                         1
#define X225_TIMER_CONT_REG1__TIMER2_ENABLE__MASK                         0x00000040
#define X225_TIMER_CONT_REG1__TIMER2_ENABLE__SHIFT                        6
#define X225_TIMER_CONT_REG1__TIMER3_ENABLE__SIZE                         1
#define X225_TIMER_CONT_REG1__TIMER3_ENABLE__MASK                         0x00000080
#define X225_TIMER_CONT_REG1__TIMER3_ENABLE__SHIFT                        7
#define X225_TIMER_CONT_REG1__TIMER4_ENABLE__SIZE                         1
#define X225_TIMER_CONT_REG1__TIMER4_ENABLE__MASK                         0x00000100
#define X225_TIMER_CONT_REG1__TIMER4_ENABLE__SHIFT                        8
#define X225_TIMER_CONT_REG1__TIMER5_ENABLE__SIZE                         1
#define X225_TIMER_CONT_REG1__TIMER5_ENABLE__MASK                         0x00000200
#define X225_TIMER_CONT_REG1__TIMER5_ENABLE__SHIFT                        9
#define X225_TIMER_CONT_REG1__TIMER0_EXT_CONT__SIZE                       1
#define X225_TIMER_CONT_REG1__TIMER0_EXT_CONT__MASK                       0x00000400
#define X225_TIMER_CONT_REG1__TIMER0_EXT_CONT__SHIFT                      10
#define X225_TIMER_CONT_REG1__TIMER1_EXT_CONT__SIZE                       1
#define X225_TIMER_CONT_REG1__TIMER1_EXT_CONT__MASK                       0x00000800
#define X225_TIMER_CONT_REG1__TIMER1_EXT_CONT__SHIFT                      11
#define X225_TIMER_CONT_REG1__TIMER2_EXT_CONT__SIZE                       1
#define X225_TIMER_CONT_REG1__TIMER2_EXT_CONT__MASK                       0x00001000
#define X225_TIMER_CONT_REG1__TIMER2_EXT_CONT__SHIFT                      12
#define X225_TIMER_CONT_REG1__TIMER3_EXT_CONT__SIZE                       1
#define X225_TIMER_CONT_REG1__TIMER3_EXT_CONT__MASK                       0x00002000
#define X225_TIMER_CONT_REG1__TIMER3_EXT_CONT__SHIFT                      13
#define X225_TIMER_CONT_REG1__TIMER0_CONST_COUNT__SIZE                    1
#define X225_TIMER_CONT_REG1__TIMER0_CONST_COUNT__MASK                    0x00004000
#define X225_TIMER_CONT_REG1__TIMER0_CONST_COUNT__SHIFT                   14
#define X225_TIMER_CONT_REG1__TIMER1_CONST_COUNT__SIZE                    1
#define X225_TIMER_CONT_REG1__TIMER1_CONST_COUNT__MASK                    0x00008000
#define X225_TIMER_CONT_REG1__TIMER1_CONST_COUNT__SHIFT                   15
#define X225_TIMER_CONT_REG1__TIMER2_CONST_COUNT__SIZE                    1
#define X225_TIMER_CONT_REG1__TIMER2_CONST_COUNT__MASK                    0x00010000
#define X225_TIMER_CONT_REG1__TIMER2_CONST_COUNT__SHIFT                   16
#define X225_TIMER_CONT_REG1__TIMER3_CONST_COUNT__SIZE                    1
#define X225_TIMER_CONT_REG1__TIMER3_CONST_COUNT__MASK                    0x00020000
#define X225_TIMER_CONT_REG1__TIMER3_CONST_COUNT__SHIFT                   17
#define X225_TIMER_CONT_REG1__TIMER4_CONST_COUNT__SIZE                    1
#define X225_TIMER_CONT_REG1__TIMER4_CONST_COUNT__MASK                    0x00040000
#define X225_TIMER_CONT_REG1__TIMER4_CONST_COUNT__SHIFT                   18
#define X225_TIMER_CONT_REG1__TIMER5_CONST_COUNT__SIZE                    1
#define X225_TIMER_CONT_REG1__TIMER5_CONST_COUNT__MASK                    0x00080000
#define X225_TIMER_CONT_REG1__TIMER5_CONST_COUNT__SHIFT                   19
#define X225_TIMER_CONT_REG1__TIMER0_INTRR_ENABLE__SIZE                   1
#define X225_TIMER_CONT_REG1__TIMER0_INTRR_ENABLE__MASK                   0x00100000
#define X225_TIMER_CONT_REG1__TIMER0_INTRR_ENABLE__SHIFT                  20
#define X225_TIMER_CONT_REG1__TIMER1_INTRR_ENABLE__SIZE                   1
#define X225_TIMER_CONT_REG1__TIMER1_INTRR_ENABLE__MASK                   0x00200000
#define X225_TIMER_CONT_REG1__TIMER1_INTRR_ENABLE__SHIFT                  21
#define X225_TIMER_CONT_REG1__TIMER2_INTRR_ENABLE__SIZE                   1
#define X225_TIMER_CONT_REG1__TIMER2_INTRR_ENABLE__MASK                   0x00400000
#define X225_TIMER_CONT_REG1__TIMER2_INTRR_ENABLE__SHIFT                  22
#define X225_TIMER_CONT_REG1__TIMER3_INTRR_ENABLE__SIZE                   1
#define X225_TIMER_CONT_REG1__TIMER3_INTRR_ENABLE__MASK                   0x00800000
#define X225_TIMER_CONT_REG1__TIMER3_INTRR_ENABLE__SHIFT                  23
#define X225_TIMER_CONT_REG1__TIMER4_INTRR_ENABLE__SIZE                   1
#define X225_TIMER_CONT_REG1__TIMER4_INTRR_ENABLE__MASK                   0x01000000
#define X225_TIMER_CONT_REG1__TIMER4_INTRR_ENABLE__SHIFT                  24
#define X225_TIMER_CONT_REG1__TIMER5_INTRR_ENABLE__SIZE                   1
#define X225_TIMER_CONT_REG1__TIMER5_INTRR_ENABLE__MASK                   0x02000000
#define X225_TIMER_CONT_REG1__TIMER5_INTRR_ENABLE__SHIFT                  25
#define X225_TIMER_CONT_REG1__TIMER0_LINK_TO_TIMER5__SIZE                 1
#define X225_TIMER_CONT_REG1__TIMER0_LINK_TO_TIMER5__MASK                 0x04000000
#define X225_TIMER_CONT_REG1__TIMER0_LINK_TO_TIMER5__SHIFT                26
#define X225_TIMER_CONT_REG1__TIMER1_LINK_TO_TIMER0__SIZE                 1
#define X225_TIMER_CONT_REG1__TIMER1_LINK_TO_TIMER0__MASK                 0x08000000
#define X225_TIMER_CONT_REG1__TIMER1_LINK_TO_TIMER0__SHIFT                27
#define X225_TIMER_CONT_REG1__TIMER2_LINK_TO_TIMER1__SIZE                 1
#define X225_TIMER_CONT_REG1__TIMER2_LINK_TO_TIMER1__MASK                 0x10000000
#define X225_TIMER_CONT_REG1__TIMER2_LINK_TO_TIMER1__SHIFT                28
#define X225_TIMER_CONT_REG1__TIMER3_LINK_TO_TIMER2__SIZE                 1
#define X225_TIMER_CONT_REG1__TIMER3_LINK_TO_TIMER2__MASK                 0x20000000
#define X225_TIMER_CONT_REG1__TIMER3_LINK_TO_TIMER2__SHIFT                29
#define X225_TIMER_CONT_REG1__TIMER4_LINK_TO_TIMER3__SIZE                 1
#define X225_TIMER_CONT_REG1__TIMER4_LINK_TO_TIMER3__MASK                 0x40000000
#define X225_TIMER_CONT_REG1__TIMER4_LINK_TO_TIMER3__SHIFT                30
#define X225_TIMER_CONT_REG1__TIMER5_LINK_TO_TIMER4__SIZE                 1
#define X225_TIMER_CONT_REG1__TIMER5_LINK_TO_TIMER4__MASK                 0x80000000
#define X225_TIMER_CONT_REG1__TIMER5_LINK_TO_TIMER4__SHIFT                31

/* REGISTER:  TIMER_CONT_REG2 */

#define X225_TIMER_CONT_REG2__SIZE                                        32
#define X225_TIMER_CONT_REG2__BYTELANE                                    0
#define X225_TIMER_CONT_REG2__WRMASK                                      0x00003fff
#define X225_TIMER_CONT_REG2__RDMASK                                      0x00000000
#define X225_TIMER_CONT_REG2__WOMASK                                      0x00003fff

#define mmX225_TIMER_CONT_REG2                                            0x2908

#define X225_TIMER_CONT_REG2__TIMER0_INPUT_MODE__SIZE                     3
#define X225_TIMER_CONT_REG2__TIMER0_INPUT_MODE__MASK                     0x00000007
#define X225_TIMER_CONT_REG2__TIMER0_INPUT_MODE__SHIFT                    0
#define X225_TIMER_CONT_REG2__TIMER1_INPUT_MODE__SIZE                     3
#define X225_TIMER_CONT_REG2__TIMER1_INPUT_MODE__MASK                     0x00000038
#define X225_TIMER_CONT_REG2__TIMER1_INPUT_MODE__SHIFT                    3
#define X225_TIMER_CONT_REG2__TIMER2_INPUT_MODE__SIZE                     3
#define X225_TIMER_CONT_REG2__TIMER2_INPUT_MODE__MASK                     0x000001c0
#define X225_TIMER_CONT_REG2__TIMER2_INPUT_MODE__SHIFT                    6
#define X225_TIMER_CONT_REG2__TIMER3_INPUT_MODE__SIZE                     3
#define X225_TIMER_CONT_REG2__TIMER3_INPUT_MODE__MASK                     0x00000e00
#define X225_TIMER_CONT_REG2__TIMER3_INPUT_MODE__SHIFT                    9
#define X225_TIMER_CONT_REG2__TIMER4_INPUT_MODE__SIZE                     1
#define X225_TIMER_CONT_REG2__TIMER4_INPUT_MODE__MASK                     0x00001000
#define X225_TIMER_CONT_REG2__TIMER4_INPUT_MODE__SHIFT                    12
#define X225_TIMER_CONT_REG2__TIMER5_INPUT_MODE__SIZE                     1
#define X225_TIMER_CONT_REG2__TIMER5_INPUT_MODE__MASK                     0x00002000
#define X225_TIMER_CONT_REG2__TIMER5_INPUT_MODE__SHIFT                    13

/* REGISTER:  TIMER_INTRR_STATS_REG */