integ.h

来自「for mips adm5120 uclibc-0.9.19 toolchain」· C头文件 代码 · 共 92 行

#ifndef __IDT_INTEG_H__
#define __IDT_INTEG_H__

/*******************************************************************************
 *
 * Copyright 2002 Integrated Device Technology, Inc.
 *		All rights reserved.
 *
 * System Integrity register definition.
 *
 * File   : $Id: integ.h,v 1.1 2004/10/15 12:47:26 brianc Exp $
 *
 * Author : [e-mail]
 * Date   : 20011005
 * Update :
 *	    $Log: integ.h,v $
 *	    Revision 1.1  2004/10/15 12:47:26  brianc
 *	    Readd the file
 *	
 *	    Revision 1.1.1.1  2004/03/29 00:54:44  daniell
 *	    Initialized the project
 *	
 *	    Revision 1.2  2003/07/30 18:20:38  stevel
 *	    MR: 1-2IQL9
 *	
 *	    Add IDT and ATI Xilleon LSP's, and update related drivers.
 *	
 *	    Revision 1.1.2.1  2003/02/15 00:06:01  stevel
 *	    New IDT board support: 79EB438 and 79RP355. Also support for
 *	    boot from PROM on 79S334A, 79EB355, 79RP355, and 79EB438.
 *	
 *	    Revision 1.3  2002/06/06 18:34:04  astichte
 *	    Added XXX_PhysicalAddress and XXX_VirtualAddress
 *	
 *	    Revision 1.2  2002/06/05 18:32:33  astichte
 *	    Removed IDTField
 *	
 *	    Revision 1.1  2002/05/29 17:33:22  sysarch
 *	    jba File moved from vcode/include/idt/acacia
 *
 ******************************************************************************/

enum
{
	INTEG0_PhysicalAddress	= 0x18030000,
	INTEG_PhysicalAddress	= INTEG0_PhysicalAddress,	// Default

	INTEG0_VirtualAddress	= 0xb8030000,
	INTEG_VirtualAddress	= INTEG0_VirtualAddress,	// Default
} ;

// if you are looing for CEA, try rst.h
typedef struct
{
	unsigned int filler [0xc] ;		// 0x30 bytes unused.
	unsigned int errcs ;			// sticky use ERRCS_
	unsigned int wtcount ;			// Watchdog timer count reg.
	unsigned int wtcompare ;			// Watchdog timer timeout value.
	unsigned int wtc ;			// Watchdog timer control. use WTC_
} volatile *INTEG_t ;

enum
{
	ERRCS_wto_b		= 0,		// In INTEG_t -> errcs
	ERRCS_wto_m		= 0x00000001,
	ERRCS_wne_b		= 1,		// In INTEG_t -> errcs
	ERRCS_wne_m		= 0x00000002,
	ERRCS_ucw_b		= 2,		// In INTEG_t -> errcs
	ERRCS_ucw_m		= 0x00000004,
	ERRCS_ucr_b		= 3,		// In INTEG_t -> errcs
	ERRCS_ucr_m		= 0x00000008,
	ERRCS_upw_b		= 4,		// In INTEG_t -> errcs
	ERRCS_upw_m		= 0x00000010,
	ERRCS_upr_b		= 5,		// In INTEG_t -> errcs
	ERRCS_upr_m		= 0x00000020,
	ERRCS_udw_b		= 6,		// In INTEG_t -> errcs
	ERRCS_udw_m		= 0x00000040,
	ERRCS_udr_b		= 7,		// In INTEG_t -> errcs
	ERRCS_udr_m		= 0x00000080,
	ERRCS_sae_b		= 8,		// In INTEG_t -> errcs
	ERRCS_sae_m		= 0x00000100,
	ERRCS_wre_b		= 9,		// In INTEG_t -> errcs
	ERRCS_wre_m		= 0x00000200,

	WTC_en_b		= 0,		// In INTEG_t -> wtc
	WTC_en_m		= 0x00000001,
	WTC_to_b		= 1,		// In INTEG_t -> wtc
	WTC_to_m		= 0x00000002,
} ;

#endif	// __IDT_INTEG_H__