spi.h

来自「for mips adm5120 uclibc-0.9.19 toolchain」· C头文件 代码 · 共 120 行

#ifndef __IDT_SPI_H__
#define __IDT_SPI_H__

/*******************************************************************************
 *
 * Copyright 2002 Integrated Device Technology, Inc.
 *		All rights reserved.
 *
 * Serial Peripheral Interface register definitions. 
 *
 * File   : $Id: spi.h,v 1.1 2004/10/15 12:47:26 brianc Exp $
 *
 * Author : [e-mail]
 * Date   : 20011005
 * Update :
 *	    $Log: spi.h,v $
 *	    Revision 1.1  2004/10/15 12:47:26  brianc
 *	    Readd the file
 *	
 *	    Revision 1.1.1.1  2004/03/29 00:54:44  daniell
 *	    Initialized the project
 *	
 *	    Revision 1.2  2003/07/30 18:20:38  stevel
 *	    MR: 1-2IQL9
 *	
 *	    Add IDT and ATI Xilleon LSP's, and update related drivers.
 *	
 *	    Revision 1.1.2.1  2003/02/15 00:06:01  stevel
 *	    New IDT board support: 79EB438 and 79RP355. Also support for
 *	    boot from PROM on 79S334A, 79EB355, 79RP355, and 79EB438.
 *	
 *	    Revision 1.2  2002/06/06 18:34:05  astichte
 *	    Added XXX_PhysicalAddress and XXX_VirtualAddress
 *	
 *	    Revision 1.1  2002/05/29 17:33:25  sysarch
 *	    jba File moved from vcode/include/idt/acacia
 *	
 *
 ******************************************************************************/

enum
{
	SPI0_PhysicalAddress	= 0x18078000,
	SPI_PhysicalAddress	= SPI0_PhysicalAddress,

	SPI0_VirtualAddress	= 0xb8078000,
	SPI_VirtualAddress	= SPI0_VirtualAddress,
} ;

typedef struct
{
	unsigned int spcp ;	// prescalar. 0=off, * spiClk = sysClk/(2*(spcp+1)*SPR)
	unsigned int spc ;	// spi control reg use SPC_
	unsigned int sps ;	// spi status reg use SPS_
	unsigned int spd ;	// spi data reg use SPD_
	unsigned int siofunc ;	// serial IO function use SIOFUNC_
	unsigned int siocfg ;	// serial IO config use SIOCFG_
	unsigned int siod;	// serial IO data use SIOD_
} volatile *SPI_t ;

enum
{
	SPCP_div_b	 = 0,	       
	SPCP_div_m	 = 0x000000ff,
	SPC_spr_b	= 0,	       
	SPC_spr_m	= 0x00000003,
	     SPC_spr_div2_v  = 0,
	     SPC_spr_div4_v  = 1,
	     SPC_spr_div16_v = 2,
	     SPC_spr_div32_v = 3,
	SPC_cpha_b	= 2,	       
	SPC_cpha_m	= 0x00000004,
	SPC_cpol_b	= 3,	       
	SPC_cpol_m	= 0x00000008,
	SPC_mstr_b	= 4,	       
	SPC_mstr_m	= 0x00000010,
	SPC_spe_b	= 6,	       
	SPC_spe_m	= 0x00000040,
	SPC_spie_b	= 7,	       
	SPC_spie_m	= 0x00000080,

	SPS_modf_b	= 4,	       
	SPS_modf_m	= 0x00000010,
	SPS_wcol_b	= 6,	       
	SPS_wcol_m	= 0x00000040,
	SPS_spif_b	= 7,	       
	SPS_spif_m	= 0x00000070,

	SPD_data_b	= 0,	       
	SPD_data_m	= 0x000000ff,

	SIOFUNC_sdo_b	    = 0,	   
	SIOFUNC_sdo_m	    = 0x00000001,
	SIOFUNC_sdi_b	    = 1,	   
	SIOFUNC_sdi_m	    = 0x00000002,
	SIOFUNC_sck_b	    = 2,	   
	SIOFUNC_sck_m	    = 0x00000004,
	SIOFUNC_pci_b	    = 3,	   
	SIOFUNC_pci_m	    = 0x00000008,
	
	SIOCFG_sdo_b	   = 0, 	   
	SIOCFG_sdo_m	   = 0x00000001,
	SIOCFG_sdi_b	   = 1, 	   
	SIOCFG_sdi_m	   = 0x00000002,
	SIOCFG_sck_b	   = 2, 	   
	SIOCFG_sck_m	   = 0x00000004,
	SIOCFG_pci_b	   = 3, 	   
	SIOCFG_pci_m	   = 0x00000008,
	
	SIOD_sdo_b	 = 0,		 
	SIOD_sdo_m	 = 0x00000001,
	SIOD_sdi_b	 = 1,		 
	SIOD_sdi_m	 = 0x00000002,
	SIOD_sck_b	 = 2,		 
	SIOD_sck_m	 = 0x00000004,
	SIOD_pci_b	 = 3,		 
	SIOD_pci_m	 = 0x00000008,
} ;
#endif	// __IDT_SPI_H__