📄 linux-2.6.12-rc4-mips-headers.patch
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#define ELF_CORE_COPY_REGS(elf_regs, regs) \ dump_regs((elf_greg_t *)&(elf_regs), regs);+#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs) #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \ dump_task_fpu(tsk, elf_fpregs) #endif /* __KERNEL__ */ -/* This one accepts IRIX binaries. */-#define irix_elf_check_arch(hdr) ((hdr)->e_flags & RHF_SGI_ONLY)- #define USE_ELF_CORE_DUMP #define ELF_EXEC_PAGESIZE PAGE_SIZE diff -urN -x CVS -x .cvsignore linux-2.6.12-rc4/include/asm-mips/errno.h /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/errno.h--- linux-2.6.12-rc4/include/asm-mips/errno.h 2005-05-20 16:18:24.083258634 -0500+++ /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/errno.h 2004-11-18 22:41:45.739923595 -0600@@ -115,10 +115,6 @@ #define EKEYREVOKED 163 /* Key has been revoked */ #define EKEYREJECTED 164 /* Key was rejected by service */ -/* for robust mutexes */-#define EOWNERDEAD 165 /* Owner died */-#define ENOTRECOVERABLE 166 /* State not recoverable */- #define EDQUOT 1133 /* Quota exceeded */ #ifdef __KERNEL__diff -urN -x CVS -x .cvsignore linux-2.6.12-rc4/include/asm-mips/fixmap.h /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/fixmap.h--- linux-2.6.12-rc4/include/asm-mips/fixmap.h 2005-04-27 13:21:55.000000000 -0500+++ /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/fixmap.h 2005-02-07 20:31:57.811553413 -0600@@ -107,4 +107,11 @@ return __virt_to_fix(vaddr); } +/*+ * Called from pgtable_init()+ */+extern void fixrange_init(unsigned long start, unsigned long end,+ pgd_t *pgd_base);++ #endifdiff -urN -x CVS -x .cvsignore linux-2.6.12-rc4/include/asm-mips/fpu.h /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/fpu.h--- linux-2.6.12-rc4/include/asm-mips/fpu.h 2004-10-18 16:53:51.000000000 -0500+++ /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/fpu.h 2005-05-09 22:31:42.765390313 -0500@@ -80,9 +80,14 @@ #define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU) +static inline int __is_fpu_owner(void)+{+ return test_thread_flag(TIF_USEDFPU);+}+ static inline int is_fpu_owner(void) {- return cpu_has_fpu && test_thread_flag(TIF_USEDFPU); + return cpu_has_fpu && __is_fpu_owner(); } static inline void own_fpu(void)@@ -127,7 +132,7 @@ static inline fpureg_t *get_fpu_regs(struct task_struct *tsk) { if (cpu_has_fpu) {- if ((tsk == current) && is_fpu_owner()) + if ((tsk == current) && __is_fpu_owner()) _save_fp(current); return tsk->thread.fpu.hard.fpr; }diff -urN -x CVS -x .cvsignore linux-2.6.12-rc4/include/asm-mips/fpu_emulator.h /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/fpu_emulator.h--- linux-2.6.12-rc4/include/asm-mips/fpu_emulator.h 2004-10-18 16:54:08.000000000 -0500+++ /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/fpu_emulator.h 2005-05-14 11:05:52.396985110 -0500@@ -23,16 +23,15 @@ #ifndef _ASM_FPU_EMULATOR_H #define _ASM_FPU_EMULATOR_H -struct mips_fpu_emulator_private {- unsigned int eir;- struct {- unsigned int emulated;- unsigned int loads;- unsigned int stores;- unsigned int cp1ops;- unsigned int cp1xops;- unsigned int errors;- } stats;+struct mips_fpu_emulator_stats {+ unsigned int emulated;+ unsigned int loads;+ unsigned int stores;+ unsigned int cp1ops;+ unsigned int cp1xops;+ unsigned int errors; }; +extern struct mips_fpu_emulator_stats fpuemustats;+ #endif /* _ASM_FPU_EMULATOR_H */diff -urN -x CVS -x .cvsignore linux-2.6.12-rc4/include/asm-mips/hazards.h /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/hazards.h--- linux-2.6.12-rc4/include/asm-mips/hazards.h 2005-04-27 13:23:30.000000000 -0500+++ /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/hazards.h 2005-03-02 20:14:42.252780371 -0600@@ -107,6 +107,7 @@ " .endm \n\t"); #ifdef CONFIG_CPU_RM9000+ /* * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent * use of the JTLB for instructions should not occur for 4 cpu cycles and use@@ -124,6 +125,9 @@ ".set\tmips32\n\t" \ "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \ ".set\tmips0")++#define back_to_back_c0_hazard() do { } while (0)+ #else /*@@ -170,6 +174,10 @@ __asm__ __volatile__( \ "_ehb\t\t\t\t# irq_disable_hazard") +#define back_to_back_c0_hazard() \+ __asm__ __volatile__( \+ "_ehb\t\t\t\t# back_to_back_c0_hazard")+ #elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) /*@@ -186,6 +194,8 @@ #define irq_enable_hazard() do { } while (0) #define irq_disable_hazard() do { } while (0) +#define back_to_back_c0_hazard() do { } while (0)+ #else /*@@ -210,6 +220,12 @@ __asm__ __volatile__( \ "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard") +#define back_to_back_c0_hazard() \+ __asm__ __volatile__( \+ " .set noreorder \n" \+ " nop; nop; nop \n" \+ " .set reorder \n")+ #endif #endif /* __ASSEMBLY__ */diff -urN -x CVS -x .cvsignore linux-2.6.12-rc4/include/asm-mips/hp-lj/asic.h /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/hp-lj/asic.h--- linux-2.6.12-rc4/include/asm-mips/hp-lj/asic.h 2004-10-18 16:55:28.000000000 -0500+++ /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/hp-lj/asic.h 1969-12-31 18:00:00.000000000 -0600@@ -1,7 +0,0 @@--typedef enum { IllegalAsic, UnknownAsic, AndrosAsic, HarmonyAsic } AsicId;--AsicId GetAsicId(void);--const char* const GetAsicName(void);-diff -urN -x CVS -x .cvsignore linux-2.6.12-rc4/include/asm-mips/inst.h /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/inst.h--- linux-2.6.12-rc4/include/asm-mips/inst.h 2004-10-18 16:54:07.000000000 -0500+++ /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/inst.h 2005-04-13 19:47:08.678626579 -0500@@ -28,7 +28,7 @@ sdl_op, sdr_op, swr_op, cache_op, ll_op, lwc1_op, lwc2_op, pref_op, lld_op, ldc1_op, ldc2_op, ld_op,- sc_op, swc1_op, swc2_op, major_3b_op, /* Opcode 0x3b is unused */+ sc_op, swc1_op, swc2_op, rdhwr_op, scd_op, sdc1_op, sdc2_op, sd_op }; diff -urN -x CVS -x .cvsignore linux-2.6.12-rc4/include/asm-mips/inventory.h /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/inventory.h--- linux-2.6.12-rc4/include/asm-mips/inventory.h 2004-10-18 16:53:43.000000000 -0500+++ /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/inventory.h 2005-03-21 20:41:42.625239920 -0600@@ -4,6 +4,8 @@ #ifndef __ASM_INVENTORY_H #define __ASM_INVENTORY_H +#include <linux/compiler.h>+ typedef struct inventory_s { struct inventory_s *inv_next; int inv_class;@@ -14,7 +16,9 @@ } inventory_t; extern int inventory_items;-void add_to_inventory (int class, int type, int controller, int unit, int state);-int dump_inventory_to_user (void *userbuf, int size);++extern void add_to_inventory (int class, int type, int controller, int unit, int state);+extern int dump_inventory_to_user (void __user *userbuf, int size);+extern int __init init_inventory(void); #endif /* __ASM_INVENTORY_H */diff -urN -x CVS -x .cvsignore linux-2.6.12-rc4/include/asm-mips/io.h /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/io.h--- linux-2.6.12-rc4/include/asm-mips/io.h 2005-05-20 16:18:24.084258464 -0500+++ /data/cvs-ext/linux-2.6-mips/linux/include/asm-mips/io.h 2005-04-19 18:21:06.814901711 -0500@@ -34,7 +34,7 @@ #undef CONF_SLOWDOWN_IO /*- * Raw operations are never swapped in software. Otoh values that raw+ * Raw operations are never swapped in software. OTOH values that raw * operations are working on may or may not have been swapped by the bus * hardware. An example use would be for flash memory that's used for * execute in place.@@ -43,45 +43,53 @@ # define __raw_ioswabw(x) (x) # define __raw_ioswabl(x) (x) # define __raw_ioswabq(x) (x)+# define ____raw_ioswabq(x) (x) /* * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware; * less sane hardware forces software to fiddle with this...+ *+ * Regardless, if the host bus endianness mismatches that of PCI/ISA, then+ * you can't have the numerical value of data and byte addresses within+ * multibyte quantities both preserved at the same time. Hence two+ * variations of functions: non-prefixed ones that preserve the value+ * and prefixed ones that preserve byte addresses. The latters are+ * typically used for moving raw data between a peripheral and memory (cf.+ * string I/O functions), hence the "mem_" prefix. */ #if defined(CONFIG_SWAP_IO_SPACE) # define ioswabb(x) (x)+# define mem_ioswabb(x) (x) # ifdef CONFIG_SGI_IP22 /* * IP22 seems braindead enough to swap 16bits values in hardware, but * not 32bits. Go figure... Can't tell without documentation. */ # define ioswabw(x) (x)+# define mem_ioswabw(x) le16_to_cpu(x) # else # define ioswabw(x) le16_to_cpu(x)+# define mem_ioswabw(x) (x) # endif # define ioswabl(x) le32_to_cpu(x)+# define mem_ioswabl(x) (x) # define ioswabq(x) le64_to_cpu(x)+# define mem_ioswabq(x) (x) #else # define ioswabb(x) (x)+# define mem_ioswabb(x) (x) # define ioswabw(x) (x)+# define mem_ioswabw(x) cpu_to_le16(x) # define ioswabl(x) (x)+# define mem_ioswabl(x) cpu_to_le32(x) # define ioswabq(x) (x)+# define mem_ioswabq(x) cpu_to_le32(x) #endif -/*- * Native bus accesses never swapped.- */-#define bus_ioswabb(x) (x)-#define bus_ioswabw(x) (x)-#define bus_ioswabl(x) (x)-#define bus_ioswabq(x) (x)--#define __bus_ioswabq bus_ioswabq- #define IO_SPACE_LIMIT 0xffff /*@@ -319,7 +327,8 @@ else if (cpu_has_64bits) { \ unsigned long __flags; \ \- local_irq_save(__flags); \+ if (irq) \+ local_irq_save(__flags); \ __asm__ __volatile__( \ ".set mips3" "\t\t# __readq" "\n\t" \ "ld %L0, %1" "\n\t" \@@ -328,7 +337,8 @@ ".set mips0" "\n" \ : "=r" (__val) \ : "m" (*__mem)); \- local_irq_restore(__flags); \+ if (irq) \+ local_irq_restore(__flags); \ } else { \ __val = 0; \ BUG(); \@@ -386,15 +396,15 @@ #define BUILDIO(bwlq, type) \ \-__BUILD_MEMORY_PFX(, bwlq, type) \ __BUILD_MEMORY_PFX(__raw_, bwlq, type) \-__BUILD_MEMORY_PFX(bus_, bwlq, type) \+__BUILD_MEMORY_PFX(, bwlq, type) \+__BUILD_MEMORY_PFX(mem_, bwlq, type) \ __BUILD_IOPORT_PFX(, bwlq, type) \-__BUILD_IOPORT_PFX(__raw_, bwlq, type)+__BUILD_IOPORT_PFX(mem_, bwlq, type) #define __BUILDIO(bwlq, type) \ \-__BUILD_MEMORY_SINGLE(__bus_, bwlq, type, 0)+__BUILD_MEMORY_SINGLE(____raw_, bwlq, type, 0) BUILDIO(b, u8) BUILDIO(w, u16)@@ -422,7 +432,7 @@ volatile type *__addr = addr; \ \ while (count--) { \- __raw_write##bwlq(*__addr, mem); \+ mem_write##bwlq(*__addr, mem); \ __addr++; \ } \ } \@@ -433,20 +443,20 @@ volatile type *__addr = addr; \ \ while (count--) { \- *__addr = __raw_read##bwlq(mem); \+ *__addr = mem_read##bwlq(mem); \ __addr++; \ } \ } #define __BUILD_IOPORT_STRING(bwlq, type) \ \-static inline void outs##bwlq(unsigned long port, void *addr, \+static inline void outs##bwlq(unsigned long port, const void *addr, \ unsigned int count) \ { \- volatile type *__addr = addr; \+ const volatile type *__addr = addr; \ \ while (count--) { \- __raw_out##bwlq(*__addr, port); \+ mem_out##bwlq(*__addr, port); \ __addr++; \ } \ } \@@ -457,7 +467,7 @@ volatile type *__addr = addr; \ \ while (count--) { \- *__addr = __raw_in##bwlq(port); \+ *__addr = mem_in##bwlq(port); \ __addr++; \ } \ }@@ -481,34 +491,6 @@ #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) /*- * Memory Mapped I/O- */-#define ioread8(addr) readb(addr)-#define ioread16(addr) readw(addr)-#define ioread32(addr) readl(addr)--#define iowrite8(b,addr) writeb(b,addr)-#define iowrite16(w,addr) writew(w,addr)-#define iowrite32(l,addr) writel(l,addr)--#define ioread8_rep(a,b,c) readsb(a,b,c)-#define ioread16_rep(a,b,c) readsw(a,b,c)-#define ioread32_rep(a,b,c) readsl(a,b,c)--#define iowrite8_rep(a,b,c) writesb(a,b,c)-#define iowrite16_rep(a,b,c) writesw(a,b,c)-#define iowrite32_rep(a,b,c) writesl(a,b,c)--/* Create a virtual mapping cookie for an IO port range */-extern void __iomem *ioport_map(unsigned long port, unsigned int nr);-extern void ioport_unmap(void __iomem *);--/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */-struct pci_dev;-extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);-extern void pci_iounmap(struct pci_dev *dev, void __iomem *);-
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