📄 ioade7169f16.h
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unsigned char TEMP_DIFF0_S : 1;
unsigned char TEMP_DIFF1_S : 1;
unsigned char TEMP_DIFF2_S : 1;
unsigned char : 1;
unsigned char : 1;
} DIFFPROG_bit;
} @ 0xF3;
__sfr __no_init volatile unsigned char BATTADC @ 0xDF;
__sfr __no_init volatile unsigned char BATVTH @ 0xFA;
__sfr __no_init volatile union
{
unsigned char STRBPER;
struct
{
unsigned char TEMP_PERIOD0_S : 1;
unsigned char TEMP_PERIOD1_S : 1;
unsigned char BATT_PERIOD0_S : 1;
unsigned char BATT_PERIOD1_S : 1;
unsigned char VSW_PERIOD0_S : 1;
unsigned char VSW_PERIOD1_S : 1;
unsigned char : 1;
unsigned char : 1;
} STRBPER_bit;
} @ 0xF9;
__sfr __no_init volatile unsigned char TEMPADC @ 0xD7;
__sfr __no_init volatile union
{
unsigned char ADCGO;
struct
{
unsigned char BATT_ADC_GO_S : 1;
unsigned char TEMP_ADC_GO_S : 1;
unsigned char VSW_ADC_GO_S : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char PLL_FTL_ACK_S : 1;
} ADCGO_bit;
} @ 0xD8;
/*-------------------------------------------------------------------------
* I/O Ports
*-------------------------------------------------------------------------*/
__sfr __no_init volatile union
{
unsigned char P1;
struct
{
unsigned char RxD_S : 1;
unsigned char TxD_S : 1;
unsigned char : 1;
unsigned char T2EX_S : 1;
unsigned char T2_S : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
} P1_bit;
} @ 0x90;
__sfr __no_init volatile union
{
unsigned char EPCFG;
struct
{
unsigned char : 1;
unsigned char : 1;
unsigned char MODE380_S : 1;
unsigned char MODE381_S : 1;
unsigned char MODE382_S : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
} EPCFG_bit;
} @ 0x9F;
__sfr __no_init volatile union
{
unsigned char P0; /* Port 0 */
struct /* Port 0 */
{
unsigned char INT1_S : 1;
unsigned char : 1;
unsigned char CF1_S : 1;
unsigned char CF2_S : 1;
unsigned char SDATA: 1;
unsigned char MISO: 1;
unsigned char T0_S : 1;
unsigned char T1_S : 1;
} P0_bit;
} @ 0x80;
__sfr __no_init volatile union
{
unsigned char P2;
struct
{
unsigned char P20_S : 1;
unsigned char P21_S : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
} P2_bit;
} @ 0xA0;
__sfr __no_init volatile union
{
unsigned char PINMAP0;
struct
{
unsigned char PINMAP00_S : 1;
unsigned char PINMAP01_S : 1;
unsigned char PINMAP02_S : 1;
unsigned char PINMAP03_S : 1;
unsigned char PINMAP04_S : 1;
unsigned char PINMAP05_S : 1;
unsigned char PINMAP06_S : 1;
unsigned char PINMAP07_S : 1;
} PINMAP0_bit;
} @ 0xB2;
__sfr __no_init volatile union
{
unsigned char PINMAP1;
struct
{
unsigned char PINMAP10_S : 1;
unsigned char PINMAP11_S : 1;
unsigned char PINMAP12_S : 1;
unsigned char PINMAP13_S : 1;
unsigned char PINMAP14_S : 1;
unsigned char PINMAP15_S : 1;
unsigned char PINMAP16_S : 1;
unsigned char PINMAP17_S : 1;
} PINMAP1_bit;
} @ 0xB3;
__sfr __no_init volatile union
{
unsigned char PINMAP2;
struct
{
unsigned char PINMAP20_S : 1;
unsigned char PINMAP21_S : 1;
unsigned char PINMAP22_S : 1;
unsigned char PINMAP23_S : 1;
unsigned char : 1;
unsigned char PINMAP25_S : 1;
unsigned char : 1;
unsigned char : 1;
} PINMAP2_bit;
} @ 0xB4;
/*-------------------------------------------------------------------------
* Core
*-------------------------------------------------------------------------*/
__sfr __no_init volatile unsigned char ACC @ 0xE0;
__sfr __no_init volatile union
{
unsigned char DPCON;
struct
{
unsigned char DPSEL_S : 1;
unsigned char : 1;
unsigned char DP0m0_S : 1;
unsigned char DP0m1_S : 1;
unsigned char DP1m0_S : 1;
unsigned char DP1m1_S : 1;
unsigned char DPT_S : 1;
unsigned char : 1;
} DPCON_bit;
} @ 0xA7;
__sfr __no_init volatile union
{
unsigned char PSW;
struct
{
unsigned char P_S : 1;
unsigned char F1_S : 1;
unsigned char OV_S : 1;
unsigned char RS0_S : 1;
unsigned char RS1_S : 1;
unsigned char F0_S : 1;
unsigned char AC_S : 1;
unsigned char CY_S : 1;
} PSW_bit;
} @ 0xD0;
/* PSW */
#define P PSW_bit.P_S
#define F1 PSW_bit.F1_S
#define OV PSW_bit.P_S
#define RS0 PSW_bit.RS0_S
#define RS1 PSW_bit.RS1_S
#define F0 PSW_bit.F0_S
#define AC PSW_bit.AC_S
#define CY PSW_bit.CY_S
__sfr __no_init volatile unsigned char SP @ 0x81;
__sfr __no_init volatile unsigned char DPL @ 0x82;
__sfr __no_init volatile union
{
unsigned char CFG;
struct
{
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char MOD38EN_S : 1;
unsigned char SCPS_S : 1;
unsigned char EXTEN_S : 1;
unsigned char EXSP_S : 1;
} CFG_bit;
} @ 0xAF;
/* CFG */
//#define MOD38EN CFG_bit.MOD38EN
//#define SCPS CFG_bit.SCPS
//#define EXTEN CFG_bit.EXTEN
//#define EXSP CFG_bit.EXSP
__sfr __no_init volatile unsigned char DPH @ 0x83;
__sfr __no_init volatile unsigned char PCON @ 0x87;
__sfr __no_init volatile unsigned char B @ 0xF0;
__sfr __no_init volatile unsigned char SPH @ 0xB7;
/*-------------------------------------------------------------------------
* Timer
*-------------------------------------------------------------------------*/
__sfr __no_init volatile unsigned char TL2 @ 0xCC;
__sfr __no_init volatile unsigned char TH0 @ 0x8C;
__sfr __no_init volatile union
{
unsigned char TCON;
struct
{
unsigned char IT0_S : 1; // bit0
unsigned char IE0_S : 1;
unsigned char IT1_S : 1;
unsigned char IE1_S : 1;
unsigned char TR0_S : 1;
unsigned char TF0_S : 1;
unsigned char TR1_S : 1;
unsigned char TF1_S : 1; // bit7
} TCON_bit;
} @ 0x88;
/* TCON */
#define IT0 TCON_bit.IT0_S
#define IE0 TCON_bit.IE0_S
#define IT1 TCON_bit.IT1_S
#define IE1 TCON_bit.IE1_S
#define TR0 TCON_bit.TR0_S
#define TF0 TCON_bit.TF0_S
#define TR1 TCON_bit.TR1_S
#define TF1 TCON_bit.TF1_S
__sfr __no_init volatile unsigned char TH2 @ 0xCD;
__sfr __no_init volatile unsigned char TH1 @ 0x8D;
__sfr __no_init volatile union
{
unsigned char TMOD;
struct
{
unsigned char M00_S : 1;
unsigned char M10_S : 1;
unsigned char C_T0_S : 1;
unsigned char Gate0_S : 1;
unsigned char M01_S : 1;
unsigned char M11_S : 1;
unsigned char C_T1_S : 1;
unsigned char Gate1_S : 1;
} TMOD_bit;
} @ 0x89;
/* TMOD */
#define M00 TMOD_bit.M00_S
#define M10 TMOD_bit.M10_S
#define C_T0 TMOD_bit.C_T0_S
#define Gate0 TMOD_bit.Gate0_S
#define M01 TMOD_bit.M01_S
#define M11 TMOD_bit.M11_S
#define C_T1 TMOD_bit.C_T1_S
#define Gate1 TMOD_bit.Gate1_S
__sfr __no_init volatile unsigned char RCAP2L @ 0xCA;
__sfr __no_init volatile unsigned char RCAP2H @ 0xCB;
__sfr __no_init volatile unsigned char TL0 @ 0x8A;
__sfr __no_init volatile union
{
unsigned char T2CON;
struct
{
unsigned char CAP2_S : 1;
unsigned char CNT2_S : 1;
unsigned char TR2_S : 1;
unsigned char EXEN2_S : 1;
unsigned char TCLK_S : 1;
unsigned char RCLK_S : 1;
unsigned char EXF2_S : 1;
unsigned char TF2_S : 1;
} T2CON_bit;
} @ 0xC8;
__sfr __no_init volatile unsigned char TL1 @ 0x8B;
/*-------------------------------------------------------------------------
* FLASH
*-------------------------------------------------------------------------*/
__sfr __no_init volatile unsigned char PROTKY @ 0xBB;
__sfr __no_init volatile unsigned char EDATA @ 0xBC;
__sfr __no_init volatile unsigned char ECON @ 0xB9;
__sfr __no_init volatile unsigned char PROTB0 @ 0xBD;
__sfr __no_init volatile unsigned char PROTB1 @ 0xBE;
__sfr __no_init volatile unsigned char PROTR @ 0xBF;
__sfr __no_init volatile unsigned char EADRL @ 0xC6;
__sfr __no_init volatile unsigned char EADRH @ 0xC7;
__sfr __no_init volatile unsigned char FLSHKY @ 0xBA;
/*-------------------------------------------------------------------------
* Power
*-------------------------------------------------------------------------*/
__sfr __no_init volatile union
{
unsigned char INTPR;
struct
{
unsigned char INT0PRG_S : 1;
unsigned char : 1;
unsigned char INT1PRG0_S : 1;
unsigned char INT1PRG1_S : 1;
unsigned char INT1PRG2_S : 1;
unsigned char TDIFPRG0_S : 1;
unsigned char TDIFPRG1_S : 1;
unsigned char : 1;
} INTPR_bit;
} @ 0xFF;
__sfr __no_init volatile union
{
unsigned char PERIPH;
struct
{
unsigned char RXPROG0_S : 1;
unsigned char RXPROG1_S : 1;
unsigned char EXTREFEN_S : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char VSWSOURCE_S : 1;
unsigned char RXFLAG_S : 1;
} PERIPH_bit;
} @ 0xF4;
__sfr __no_init volatile unsigned char KYREG @ 0xC1;
__sfr __no_init volatile union
{
unsigned char BATPR;
struct
{
unsigned char BATPRG0_S : 1;
unsigned char BATPRG1_S : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
} BATPR_bit;
} @ 0xF5;
__sfr __no_init volatile unsigned char SCRATCH1 @ 0xFB;
__sfr __no_init volatile unsigned char SCRATCH2 @ 0xFC;
__sfr __no_init volatile union
{
unsigned char IPSMF;
struct
{
unsigned char FVDC_S : 1;
unsigned char FBSO_S : 1;
unsigned char FBATT_S : 1;
unsigned char FVSW_S : 1;
unsigned char : 1;
unsigned char FSAG_S : 1;
unsigned char FPSM_S : 1;
unsigned char FPSR_S : 1;
} IPSMF_bit;
} @ 0xF8;
__sfr __no_init volatile union
{
unsigned char POWCON;
struct
{
unsigned char CD0_S : 1;
unsigned char CD1_S : 1;
unsigned char CD2_S : 1;
unsigned char : 1;
unsigned char COREOFF_S : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
} POWCON_bit;
} @ 0xC5;
__sfr __no_init volatile unsigned char SCRATCH3 @ 0xFD;
__sfr __no_init volatile union
{
unsigned char IPSME;
struct
{
unsigned char EVDCIN_S : 1;
unsigned char EBSO_S : 1;
unsigned char EBATT_S : 1;
unsigned char EVSW_S : 1;
unsigned char : 1;
unsigned char ESAG_S : 1;
unsigned char ADEIAUTCLR_S : 1;
unsigned char EPSR_S : 1;
} IPSME_bit;
} @ 0xEC;
__sfr __no_init volatile unsigned char SCRATCH4 @ 0xFE;
#ifdef _BIT_MACRO_
//BIT DEFINITIONS
#define INT1 (0x80)
#define CF1 (0x82)
#define CF2 (0x83)
#define T0 (0x86)
#define T1 (0x87)
#define IT0 (0x88)
#define IE0 (0x89)
#define IT1 (0x8A)
#define IE1 (0x8B)
#define TR0 (0x8C)
#define TF0 (0x8D)
#define TR1 (0x8E)
#define TF1 (0x8F)
#define RXD (0x90)
#define TXD (0x91)
#define T2EX (0x93)
#define T2 (0x94)
#define RI (0x98)
#define TI (0x99)
#define RB8 (0x9A)
#define TB8 (0x9B)
#define REN (0x9C)
#define SM2 (0x9D)
#define SM1 (0x9E)
#define SM0 (0x9F)
#define EX0 (0xA8)
#define ET0 (0xA9)
#define EX1 (0xAA)
#define ET1 (0xAB)
#define ES (0xAC)
#define ET2 (0xAD)
#define EADC (0xAE)
#define EA (0xAF)
#define PX0 (0xB8)
#define PT0 (0xB9)
#define PX1 (0xBA)
#define PT1 (0xBB)
#define PS (0xBC)
#define PT2 (0xBD)
#define PADC (0xBE)
#define PADE (0xBF)
#define WDWR (0xC0)
#define WDE (0xC1)
#define WDS (0xC2)
#define WDIR (0xC3)
#define PRE0 (0xC4)
#define PRE1 (0xC5)
#define PRE2 (0xC6)
#define PRE3 (0xC7)
#define CAP2 (0xC8)
#define CNT2 (0xC9)
#define TR2 (0xCA)
#define EXEN2 (0xCB)
#define TCLK (0xCC)
#define RCLK (0xCD)
#define EXF2 (0xCE)
#define TF2 (0xCF)
#define P (0xD0)
#define F1 (0xD1)
#define OV (0xD2)
#define RS0 (0xD3)
#define RS1 (0xD4)
#define F0 (0xD5)
#define AC (0xD6)
#define CY (0xD7)
#define BTADC (0xD8)
#define TADC (0xD9)
#define VADC (0xDA)
#define PLLACK (0xDF)
#define SPIR0 (0xE8)
#define I2CRCT0 (0xE8)
#define SPIR1 (0xE9)
#define I2CRCT1 (0xE9)
#define RXOFW (0xEA)
#define I2CRCT2 (0xEA)
#define SSE (0xEB)
#define I2CRCT3 (0xEB)
#define AUTO_SS (0xEC)
#define I2CRCT4 (0xEC)
#define I2CR0 (0xED)
#define I2CR1 (0xEE)
#define I2CEN (0xEF)
#define FVDC (0xF8)
#define FBSO (0xF9)
#define FBAT (0xFA)
#define FVSW (0xFB)
#define FSAG (0xFD)
#define FPSM (0xFE)
#define FPSR (0xFF)
#endif
//Define ADE indirect registers read and write commands
#define WATTHR_R (0x01)
#define RWATTHR_R (0x02)
#define LWATTHR_R (0x03)
#define VARHR_R (0x04)
#define RVARHR_R (0x05)
#define LVARHR_R (0x06)
#define VAHR_R (0x07)
#define RVAHR_R (0x08)
#define LVAHR_R (0x09)
#define PER_FREQ_R (0x0A)
#define MODE1_R (0x0B)
#define MODE2_R (0x0C)
#define WAVMODE_R (0x0D)
#define NLMODE_R (0x0E)
#define ACCMODE_R (0x0F)
#define PHCAL_R (0x10)
#define ZXTOUT_R (0x11)
#define LINCYC_R (0x12)
#define SAGCYC_R (0x13)
#define SAGLVL_R (0x14)
#define IPKLVL_R (0x15)
#define VPKLVL_R (0x16)
#define IPEAK_R (0x17)
#define RSTIPEAK_R (0x18)
#define VPEAK_R (0x19)
#define RSTVPEAK_R (0x1A)
#define GAIN_R (0x1B)
#define IBGAIN_R (0x1C)
#define WGAIN_R (0x1D)
#define VARGAIN_R (0x1E)
#define VAGAIN_R (0x1F)
#define WATTOS_R (0x20)
#define VAROS_R (0x21)
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