rs232.fit.qmsg

在QuartusII中使用AHDL语言编写一个RS232串行数据通信接口

{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "1.601 ns register register " "Info: Estimated most critical path is register to register delay of 1.601 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns dataoutCounter\[0\]~reg 1 REG LAB_X7_Y3 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X7_Y3; Fanout = 4; REG Node = 'dataoutCounter\[0\]~reg'" {  } { { "D:/altera/quartus50/learn/RS232/db/RS232_cmp.qrpt" "" { Report "D:/altera/quartus50/learn/RS232/db/RS232_cmp.qrpt" Compiler "RS232" "UNKNOWN" "V1" "D:/altera/quartus50/learn/RS232/db/RS232.quartus_db" { Floorplan "D:/altera/quartus50/learn/RS232/" "" "" { dataoutCounter[0]~reg } "NODE_NAME" } "" } } { "RS232.tdf" "" { Text "D:/altera/quartus50/learn/RS232/RS232.tdf" 18 16 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.151 ns) + CELL(0.590 ns) 0.741 ns _~50 2 COMB LAB_X7_Y3 3 " "Info: 2: + IC(0.151 ns) + CELL(0.590 ns) = 0.741 ns; Loc. = LAB_X7_Y3; Fanout = 3; COMB Node = '_~50'" {  } { { "D:/altera/quartus50/learn/RS232/db/RS232_cmp.qrpt" "" { Report "D:/altera/quartus50/learn/RS232/db/RS232_cmp.qrpt" Compiler "RS232" "UNKNOWN" "V1" "D:/altera/quartus50/learn/RS232/db/RS232.quartus_db" { Floorplan "D:/altera/quartus50/learn/RS232/" "" "0.741 ns" { dataoutCounter[0]~reg _~50 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.551 ns) + CELL(0.309 ns) 1.601 ns dataoutCounter\[3\]~reg 3 REG LAB_X7_Y3 3 " "Info: 3: + IC(0.551 ns) + CELL(0.309 ns) = 1.601 ns; Loc. = LAB_X7_Y3; Fanout = 3; REG Node = 'dataoutCounter\[3\]~reg'" {  } { { "D:/altera/quartus50/learn/RS232/db/RS232_cmp.qrpt" "" { Report "D:/altera/quartus50/learn/RS232/db/RS232_cmp.qrpt" Compiler "RS232" "UNKNOWN" "V1" "D:/altera/quartus50/learn/RS232/db/RS232.quartus_db" { Floorplan "D:/altera/quartus50/learn/RS232/" "" "0.860 ns" { _~50 dataoutCounter[3]~reg } "NODE_NAME" } "" } } { "RS232.tdf" "" { Text "D:/altera/quartus50/learn/RS232/RS232.tdf" 18 16 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.899 ns 56.15 % " "Info: Total cell delay = 0.899 ns ( 56.15 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.702 ns 43.85 % " "Info: Total interconnect delay = 0.702 ns ( 43.85 % )" {  } {  } 0}  } { { "D:/altera/quartus50/learn/RS232/db/RS232_cmp.qrpt" "" { Report "D:/altera/quartus50/learn/RS232/db/RS232_cmp.qrpt" Compiler "RS232" "UNKNOWN" "V1" "D:/altera/quartus50/learn/RS232/db/RS232.quartus_db" { Floorplan "D:/altera/quartus50/learn/RS232/" "" "1.601 ns" { dataoutCounter[0]~reg _~50 dataoutCounter[3]~reg } "NODE_NAME" } "" } }  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Jan 01 15:57:58 2006 " "Info: Processing ended: Sun Jan 01 15:57:58 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:12 " "Info: Elapsed time: 00:00:12" {  } {  } 0}  } {  } 0}