rs232.map.eqn

在QuartusII中使用AHDL语言编写一个RS232串行数据通信接口

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--A1L68Q is outRegister[0]~reg
--operation mode is normal

A1L68Q_lut_out = sending & (A1L88Q # dataoutset);
A1L68Q = DFFEAS(A1L68Q_lut_out, dataoutclk, VCC, , , , , , );


--A1L92 is data_to_urst~0
--operation mode is normal

A1L92 = A1L68Q & sending;


--A1L88Q is outRegister[1]~reg
--operation mode is normal

A1L88Q_lut_out = sending & (dataoutset & Cpudata[0] # !dataoutset & (A1L09Q));
A1L88Q = DFFEAS(A1L88Q_lut_out, dataoutclk, VCC, , , , , , );


--A1L09Q is outRegister[2]~reg
--operation mode is normal

A1L09Q_lut_out = sending & (dataoutset & Cpudata[1] # !dataoutset & (A1L29Q));
A1L09Q = DFFEAS(A1L09Q_lut_out, dataoutclk, VCC, , , , , , );


--A1L29Q is outRegister[3]~reg
--operation mode is normal

A1L29Q_lut_out = sending & (dataoutset & Cpudata[2] # !dataoutset & (A1L49Q));
A1L29Q = DFFEAS(A1L29Q_lut_out, dataoutclk, VCC, , , , , , );


--A1L49Q is outRegister[4]~reg
--operation mode is normal

A1L49Q_lut_out = sending & (dataoutset & Cpudata[3] # !dataoutset & (A1L69Q));
A1L49Q = DFFEAS(A1L49Q_lut_out, dataoutclk, VCC, , , , , , );


--A1L69Q is outRegister[5]~reg
--operation mode is normal

A1L69Q_lut_out = sending & (dataoutset & Cpudata[4] # !dataoutset & (A1L89Q));
A1L69Q = DFFEAS(A1L69Q_lut_out, dataoutclk, VCC, , , , , , );


--A1L89Q is outRegister[6]~reg
--operation mode is normal

A1L89Q_lut_out = sending & (dataoutset & Cpudata[5] # !dataoutset & (A1L001Q));
A1L89Q = DFFEAS(A1L89Q_lut_out, dataoutclk, VCC, , , , , , );


--A1L001Q is outRegister[7]~reg
--operation mode is normal

A1L001Q_lut_out = sending & (dataoutset & Cpudata[6] # !dataoutset & (A1L201Q));
A1L001Q = DFFEAS(A1L001Q_lut_out, dataoutclk, VCC, , , , , , );


--A1L201Q is outRegister[8]~reg
--operation mode is normal

A1L201Q_lut_out = sending & dataoutset & Cpudata[7];
A1L201Q = DFFEAS(A1L201Q_lut_out, dataoutclk, VCC, , , , , , );


--A1L83Q is dataoutCounter[0]~reg
--operation mode is normal

A1L83Q_lut_out = A1L1 & (!A1L83Q & !A1L721Q);
A1L83Q = DFFEAS(A1L83Q_lut_out, dataoutclk, VCC, , , , , , );


--A1L04Q is dataoutCounter[1]~reg
--operation mode is normal

A1L04Q_lut_out = A1L1 & !A1L721Q & (A1L83Q $ A1L04Q);
A1L04Q = DFFEAS(A1L04Q_lut_out, dataoutclk, VCC, , , , , , );


--A1L24Q is dataoutCounter[2]~reg
--operation mode is normal

A1L24Q_lut_out = A1L1 & !A1L721Q & (A1L24Q $ A1L56);
A1L24Q = DFFEAS(A1L24Q_lut_out, dataoutclk, VCC, , , , , , );


--A1L44Q is dataoutCounter[3]~reg
--operation mode is normal

A1L44Q_lut_out = A1L1 & A1L66 & (!A1L721Q);
A1L44Q = DFFEAS(A1L44Q_lut_out, dataoutclk, VCC, , , , , , );


--A1L721Q is SendCountReset~reg
--operation mode is normal

A1L721Q_lut_out = A1L44Q & A1L1 & A1L2 & !A1L24Q;
A1L721Q = DFFEAS(A1L721Q_lut_out, dataoutclk, VCC, , , , , , );


--A1L43Q is DataDelay[1]~reg
--operation mode is normal

A1L43Q_lut_out = A1L92;
A1L43Q = DFFEAS(A1L43Q_lut_out, Clock, VCC, , , , , , );


--A1L23Q is DataDelay[0]~reg
--operation mode is normal

A1L23Q_lut_out = A1L43Q;
A1L23Q = DFFEAS(A1L23Q_lut_out, Clock, VCC, , , , , , );


--A1L401 is PosEdge~0
--operation mode is normal

A1L401 = A1L43Q & (!A1L23Q);


--A1L901Q is SampleCount[0]~reg
--operation mode is normal

A1L901Q_lut_out = A1L76 & A1L601Q & (!A1L521Q);
A1L901Q = DFFEAS(A1L901Q_lut_out, Clock, VCC, , , , , , );


--A1L111Q is SampleCount[1]~reg
--operation mode is normal

A1L111Q_lut_out = A1L96 & A1L601Q & (!A1L521Q);
A1L111Q = DFFEAS(A1L111Q_lut_out, Clock, VCC, , , , , , );


--A1L311Q is SampleCount[2]~reg
--operation mode is normal

A1L311Q_lut_out = A1L17 & A1L601Q & (!A1L521Q);
A1L311Q = DFFEAS(A1L311Q_lut_out, Clock, VCC, , , , , , );


--A1L511Q is SampleCount[3]~reg
--operation mode is normal

A1L511Q_lut_out = A1L37 & A1L601Q & (!A1L521Q);
A1L511Q = DFFEAS(A1L511Q_lut_out, Clock, VCC, , , , , , );


--A1L711Q is SampleCount[4]~reg
--operation mode is normal

A1L711Q_lut_out = A1L57 & A1L601Q & (!A1L521Q);
A1L711Q = DFFEAS(A1L711Q_lut_out, Clock, VCC, , , , , , );


--A1L911Q is SampleCount[5]~reg
--operation mode is normal

A1L911Q_lut_out = A1L77 & A1L601Q & (!A1L521Q);
A1L911Q = DFFEAS(A1L911Q_lut_out, Clock, VCC, , , , , , );


--A1L121Q is SampleCount[6]~reg
--operation mode is normal

A1L121Q_lut_out = A1L97 & A1L601Q & (!A1L521Q);
A1L121Q = DFFEAS(A1L121Q_lut_out, Clock, VCC, , , , , , );


--A1L321Q is SampleCount[7]~reg
--operation mode is normal

A1L321Q_lut_out = A1L18 & A1L601Q & (!A1L521Q);
A1L321Q = DFFEAS(A1L321Q_lut_out, Clock, VCC, , , , , , );


--A1L51 is BitEdge~63
--operation mode is normal

A1L51 = A1L511Q & !A1L901Q & !A1L111Q & !A1L311Q;


--A1L601Q is Receiving~reg
--operation mode is normal

A1L601Q_lut_out = A1L43Q & (A1L601Q & !A1L031Q # !A1L23Q) # !A1L43Q & A1L601Q & (!A1L031Q);
A1L601Q = DFFEAS(A1L601Q_lut_out, Clock, VCC, , , , , , );


--A1L61 is BitEdge~64
--operation mode is normal

A1L61 = A1L711Q & A1L911Q & A1L121Q & !A1L321Q;


--A1L71 is BitEdge~65
--operation mode is normal

A1L71 = A1L51 & A1L601Q & A1L61;


--A1L84Q is InRegister[0]~reg
--operation mode is normal

A1L84Q_lut_out = A1L05Q;
A1L84Q = DFFEAS(A1L84Q_lut_out, A1L4Q, VCC, , , , , , );


--A1L05Q is InRegister[1]~reg
--operation mode is normal

A1L05Q_lut_out = A1L25Q;
A1L05Q = DFFEAS(A1L05Q_lut_out, A1L4Q, VCC, , , , , , );


--A1L25Q is InRegister[2]~reg
--operation mode is normal

A1L25Q_lut_out = A1L45Q;
A1L25Q = DFFEAS(A1L25Q_lut_out, A1L4Q, VCC, , , , , , );


--A1L45Q is InRegister[3]~reg
--operation mode is normal

A1L45Q_lut_out = A1L65Q;
A1L45Q = DFFEAS(A1L45Q_lut_out, A1L4Q, VCC, , , , , , );


--A1L65Q is InRegister[4]~reg
--operation mode is normal

A1L65Q_lut_out = A1L85Q;
A1L65Q = DFFEAS(A1L65Q_lut_out, A1L4Q, VCC, , , , , , );


--A1L85Q is InRegister[5]~reg
--operation mode is normal

A1L85Q_lut_out = A1L06Q;
A1L85Q = DFFEAS(A1L85Q_lut_out, A1L4Q, VCC, , , , , , );


--A1L06Q is InRegister[6]~reg
--operation mode is normal

A1L06Q_lut_out = A1L26Q;
A1L06Q = DFFEAS(A1L06Q_lut_out, A1L4Q, VCC, , , , , , );


--A1L26Q is InRegister[7]~reg
--operation mode is normal

A1L26Q_lut_out = A1L92;
A1L26Q = DFFEAS(A1L26Q_lut_out, A1L4Q, VCC, , , , , , );


--A1L521Q is SampleCountReset~reg
--operation mode is normal

A1L521Q_lut_out = A1L71;
A1L521Q = DFFEAS(A1L521Q_lut_out, Clock, VCC, , , , , , );


--A1L7Q is BitCounter[0]~reg
--operation mode is normal

A1L7Q_lut_out = !A1L7Q;
A1L7Q = DFFEAS(A1L7Q_lut_out, A1L4Q, A1L601Q, , , , , , );


--A1L9Q is BitCounter[1]~reg
--operation mode is normal

A1L9Q_lut_out = !A1L9Q;
A1L9Q = DFFEAS(A1L9Q_lut_out, A1L4Q, A1L601Q, , A1L7Q, , , , );


--A1L11Q is BitCounter[2]~reg
--operation mode is normal

A1L11Q_lut_out = !A1L11Q;
A1L11Q = DFFEAS(A1L11Q_lut_out, A1L4Q, A1L601Q, , A1L28, , , , );


--A1L31Q is BitCounter[3]~reg
--operation mode is normal

A1L31Q_lut_out = !A1L31Q;
A1L31Q = DFFEAS(A1L31Q_lut_out, A1L4Q, A1L601Q, , A1L38, , , , );


--A1L031Q is StopReceiving~reg
--operation mode is normal

A1L031Q_lut_out = A1L7Q & A1L31Q & !A1L9Q & !A1L11Q;
A1L031Q = DFFEAS(A1L031Q_lut_out, Clock, VCC, , , , , , );


--A1L4Q is BitClock~reg
--operation mode is normal

A1L4Q_lut_out = !A1L4Q;
A1L4Q = DFFEAS(A1L4Q_lut_out, A1L71, A1L601Q, , , , , , );


--A1L36 is op_1~126
--operation mode is normal

A1L36 = A1L68Q # A1L88Q # A1L09Q # A1L29Q;


--A1L46 is op_1~127
--operation mode is normal

A1L46 = A1L49Q # A1L69Q # A1L89Q # A1L001Q;


--A1L1 is _~267
--operation mode is normal

A1L1 = sending & (A1L201Q # A1L36 # A1L46);


--A1L56 is op_2~110
--operation mode is normal

A1L56 = A1L83Q & A1L04Q;


--A1L66 is op_2~111
--operation mode is normal

A1L66 = A1L44Q $ (A1L83Q & A1L04Q & A1L24Q);


--A1L2 is _~272
--operation mode is normal

A1L2 = !A1L83Q & !A1L04Q;


--A1L76 is op_3~120
--operation mode is arithmetic

A1L76 = !A1L901Q;

--A1L86 is op_3~122
--operation mode is arithmetic

A1L86 = CARRY(A1L901Q);


--A1L96 is op_3~125
--operation mode is arithmetic

A1L96_carry_eqn = A1L86;
A1L96 = A1L111Q $ (A1L96_carry_eqn);

--A1L07 is op_3~127
--operation mode is arithmetic

A1L07 = CARRY(!A1L86 # !A1L111Q);


--A1L17 is op_3~130
--operation mode is arithmetic

A1L17_carry_eqn = A1L07;
A1L17 = A1L311Q $ (!A1L17_carry_eqn);

--A1L27 is op_3~132
--operation mode is arithmetic

A1L27 = CARRY(A1L311Q & (!A1L07));


--A1L37 is op_3~135
--operation mode is arithmetic