e100.h

linux intel 网卡驱动,利用他可以让inel的pro 100 网卡进行网络配置和实用

#define CB_STATUS_MASK          BIT_12_15	/* CB Status Mask (4-bits) */
#define CB_STATUS_COMPLETE      BIT_15	/* CB Complete Bit */
#define CB_STATUS_OK            BIT_13	/* CB OK Bit */
#define CB_STATUS_UNDERRUN      BIT_12	/* CB A Bit */
#define CB_STATUS_FAIL          BIT_11	/* CB Fail (F) Bit */

/*misc command bits */
#define CB_TX_EOF_BIT           BIT_15	/* TX CB/TBD EOF Bit */

/* Config params */
#define CB_CFIG_BYTE_COUNT          22	/* 22 config bytes */
#define CB_CFIG_D102_BYTE_COUNT    10

/* Receive Frame Descriptor Fields */

/*- RFD Status Bits */
#define RFD_RECEIVE_COLLISION   BIT_0	/* Collision detected on Receive */
#define RFD_IA_MATCH            BIT_1	/* Indv Address Match Bit */
#define RFD_RX_ERR              BIT_4	/* RX_ERR pin on Phy was set */
#define RFD_FRAME_TOO_SHORT     BIT_7	/* Receive Frame Short */
#define RFD_DMA_OVERRUN         BIT_8	/* Receive DMA Overrun */
#define RFD_NO_RESOURCES        BIT_9	/* No Buffer Space */
#define RFD_ALIGNMENT_ERROR     BIT_10	/* Alignment Error */
#define RFD_CRC_ERROR           BIT_11	/* CRC Error */
#define RFD_STATUS_OK           BIT_13	/* RFD OK Bit */
#define RFD_STATUS_COMPLETE     BIT_15	/* RFD Complete Bit */

/*- RFD Command Bits*/
#define RFD_EL_BIT      BIT_15	/* RFD EL Bit */
#define RFD_S_BIT       BIT_14	/* RFD Suspend Bit */
#define RFD_H_BIT       BIT_4	/* Header RFD Bit */
#define RFD_SF_BIT      BIT_3	/* RFD Flexible Mode */

/*- RFD misc bits*/
#define RFD_EOF_BIT         BIT_15	/* RFD End-Of-Frame Bit */
#define RFD_F_BIT           BIT_14	/* RFD Buffer Fetch Bit */
#define RFD_ACT_COUNT_MASK  BIT_0_13	/* RFD Actual Count Mask */

/* Receive Buffer Descriptor Fields*/
#define RBD_EOF_BIT             BIT_15	/* RBD End-Of-Frame Bit */
#define RBD_F_BIT               BIT_14	/* RBD Buffer Fetch Bit */
#define RBD_ACT_COUNT_MASK      BIT_0_13	/* RBD Actual Count Mask */

#define SIZE_FIELD_MASK     BIT_0_13	/* Size of the associated buffer */
#define RBD_EL_BIT          BIT_15	/* RBD EL Bit */

/* Self Test Results*/
#define CB_SELFTEST_FAIL_BIT        BIT_12
#define CB_SELFTEST_DIAG_BIT        BIT_5
#define CB_SELFTEST_REGISTER_BIT    BIT_3
#define CB_SELFTEST_ROM_BIT         BIT_2

#define CB_SELFTEST_ERROR_MASK ( \
                CB_SELFTEST_FAIL_BIT | CB_SELFTEST_DIAG_BIT | \
                CB_SELFTEST_REGISTER_BIT | CB_SELFTEST_ROM_BIT)

/* adapter vendor & device ids */
#define PCI_OHIO_BOARD   0x10f0	/* subdevice ID, Ohio dual port nic */

/* Values for PCI_REV_ID_REGISTER values */
#define D101A4_REV_ID      4	/* 82558 A4 stepping */
#define D101B0_REV_ID      5	/* 82558 B0 stepping */
#define D101MA_REV_ID      8	/* 82559 A0 stepping */
#define D101S_REV_ID      9	/* 82559S A-step */
#define D102_REV_ID      12
#define D102C_REV_ID     13	/* 82550 step C */
#define D102E_REV_ID     15

/* ############Start of 82555 specific defines################## */

#define PHY_82555_LED_SWITCH_CONTROL    	0x1b	/* 82555 led switch control register */

/* 82555 led switch control reg. opcodes */
#define PHY_82555_LED_NORMAL_CONTROL    0	// control back to the 8255X
#define PHY_82555_LED_DRIVER_CONTROL    BIT_2	// the driver is in control
#define PHY_82555_LED_OFF               BIT_2	// activity LED is off
#define PHY_82555_LED_ON_559           (BIT_0 | BIT_2)	// activity LED is on for 559 and later
#define PHY_82555_LED_ON_PRE_559       (BIT_0 | BIT_1 | BIT_2)	// activity LED is on for 558 and before

// Describe the state of the phy led.
// needed for the function : 'e100_blink_timer'
enum led_state_e {
	LED_OFF = 0,
	LED_ON,
};

/* ############End of 82555 specific defines##################### */

#define RFD_PARSE_BIT			BIT_3
#define RFD_TCP_PACKET			0x00
#define RFD_UDP_PACKET			0x01
#define TCPUDP_CHECKSUM_BIT_VALID	BIT_4
#define TCPUDP_CHECKSUM_VALID		BIT_5
#define CHECKSUM_PROTOCOL_MASK		0x03

#define VLAN_SIZE   4
#define CHKSUM_SIZE 2
#define RFD_DATA_SIZE (ETH_FRAME_LEN + CHKSUM_SIZE + VLAN_SIZE)

/* Bits for bdp->flags */
#define DF_LINK_FC_CAP     0x00000001	/* Link is flow control capable */
#define DF_CSUM_OFFLOAD    0x00000002
#define DF_UCODE_LOADED    0x00000004
#define USE_IPCB           0x00000008	/* set if using ipcb for transmits */
#define IS_BACHELOR        0x00000010	/* set if 82558 or newer board */
#define IS_ICH             0x00000020
#define DF_SPEED_FORCED    0x00000040	/* set if speed is forced */
#define LED_IS_ON	   0x00000080	/* LED is turned ON by the driver */
#define DF_LINK_FC_TX_ONLY 0x00000100	/* Received PAUSE frames are honored*/

#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0)
#define DF_LINK_UP         0x00100000	/* set if link is up */
#endif

#ifdef IANS
/* ANS flags */
#define DF_OPENED          0x10000000
#endif

typedef struct net_device_stats net_dev_stats_t;

/* needed macros */
/* These macros use the bdp pointer. If you use them it better be defined */
#define PREV_TCB_USED(X)  ((X).tail ? (X).tail - 1 : bdp->params.TxDescriptors - 1)
#define NEXT_TCB_TOUSE(X) ((((X) + 1) >= bdp->params.TxDescriptors) ? 0 : (X) + 1)
#define TCB_TO_USE(X)     ((X).tail)
#define TCBS_AVAIL(X)     (NEXT_TCB_TOUSE( NEXT_TCB_TOUSE((X).tail)) != (X).head)

#define RFD_POINTER(skb,bdp)      ((rfd_t *) (((unsigned char *)((skb)->data))-((bdp)->rfd_size)))
#define SKB_RFD_STATUS(skb,bdp)   ((RFD_POINTER((skb),(bdp)))->rfd_header.cb_status)

/* ====================================================================== */
/*                              82557                                     */
/* ====================================================================== */

/* Changed for 82558 enhancement */
typedef struct _d101_scb_ext_t {
	u32 scb_rx_dma_cnt;	/* Rx DMA byte count */
	u8 scb_early_rx_int;	/* Early Rx DMA byte count */
	u8 scb_fc_thld;	/* Flow Control threshold */
	u8 scb_fc_xon_xoff;	/* Flow Control XON/XOFF values */
	u8 scb_pmdr;	/* Power Mgmt. Driver Reg */
} d101_scb_ext __attribute__ ((__packed__));

/* Changed for 82559 enhancement */
typedef struct _d101m_scb_ext_t {
	u32 scb_rx_dma_cnt;	/* Rx DMA byte count */
	u8 scb_early_rx_int;	/* Early Rx DMA byte count */
	u8 scb_fc_thld;	/* Flow Control threshold */
	u8 scb_fc_xon_xoff;	/* Flow Control XON/XOFF values */
	u8 scb_pmdr;	/* Power Mgmt. Driver Reg */
	u8 scb_gen_ctrl;	/* General Control */
	u8 scb_gen_stat;	/* General Status */
	u16 scb_reserved;	/* Reserved */
	u32 scb_function_event;	/* Cardbus Function Event */
	u32 scb_function_event_mask;	/* Cardbus Function Mask */
	u32 scb_function_present_state;	/* Cardbus Function state */
	u32 scb_force_event;	/* Cardbus Force Event */
} d101m_scb_ext __attribute__ ((__packed__));

/* Changed for 82550 enhancement */
typedef struct _d102_scb_ext_t {
	u32 scb_rx_dma_cnt;	/* Rx DMA byte count */
	u8 scb_early_rx_int;	/* Early Rx DMA byte count */
	u8 scb_fc_thld;	/* Flow Control threshold */
	u8 scb_fc_xon_xoff;	/* Flow Control XON/XOFF values */
	u8 scb_pmdr;	/* Power Mgmt. Driver Reg */
	u8 scb_gen_ctrl;	/* General Control */
	u8 scb_gen_stat;	/* General Status */
	u8 scb_gen_ctrl2;
	u8 scb_reserved;	/* Reserved */
	u32 scb_scheduling_reg;
	u32 scb_reserved2;
	u32 scb_function_event;	/* Cardbus Function Event */
	u32 scb_function_event_mask;	/* Cardbus Function Mask */
	u32 scb_function_present_state;	/* Cardbus Function state */
	u32 scb_force_event;	/* Cardbus Force Event */
} d102_scb_ext __attribute__ ((__packed__));

/*
 * 82557 status control block. this will be memory mapped & will hang of the
 * the bdp, which hangs of the bdp. This is the brain of it.
 */
typedef struct _scb_t {
	u16 scb_status;	/* SCB Status register */
	u8 scb_cmd_low;	/* SCB Command register (low byte) */
	u8 scb_cmd_hi;	/* SCB Command register (high byte) */
	u32 scb_gen_ptr;	/* SCB General pointer */
	u32 scb_port;	/* PORT register */
	u16 scb_flsh_cntrl;	/* Flash Control register */
	u16 scb_eprm_cntrl;	/* EEPROM control register */
	u32 scb_mdi_cntrl;	/* MDI Control Register */
	/* Changed for 82558 enhancement */
	union {
		u32 scb_rx_dma_cnt;	/* Rx DMA byte count */
		d101_scb_ext d101_scb;	/* 82558/9 specific fields */
		d101m_scb_ext d101m_scb;	/* 82559 specific fields */
		d102_scb_ext d102_scb;
	} scb_ext;
} scb_t __attribute__ ((__packed__));

/* Self test
 * This is used to dump results of the self test 
 */
typedef struct _self_test_t {
	u32 st_sign;	/* Self Test Signature */
	u32 st_result;	/* Self Test Results */
} self_test_t __attribute__ ((__packed__));

/* 
 *  Statistical Counters 
 */
/* 82557 counters */
typedef struct _basic_cntr_t {
	u32 xmt_gd_frames;	/* Good frames transmitted */
	u32 xmt_max_coll;	/* Fatal frames -- had max collisions */
	u32 xmt_late_coll;	/* Fatal frames -- had a late coll. */
	u32 xmt_uruns;	/* Xmit underruns (fatal or re-transmit) */
	u32 xmt_lost_crs;	/* Frames transmitted without CRS */
	u32 xmt_deferred;	/* Deferred transmits */
	u32 xmt_sngl_coll;	/* Transmits that had 1 and only 1 coll. */
	u32 xmt_mlt_coll;	/* Transmits that had multiple coll. */
	u32 xmt_ttl_coll;	/* Transmits that had 1+ collisions. */
	u32 rcv_gd_frames;	/* Good frames received */
	u32 rcv_crc_errs;	/* Aligned frames that had a CRC error */
	u32 rcv_algn_errs;	/* Receives that had alignment errors */
	u32 rcv_rsrc_err;	/* Good frame dropped cuz no resources */
	u32 rcv_oruns;	/* Overrun errors - bus was busy */
	u32 rcv_err_coll;	/* Received frms. that encountered coll. */
	u32 rcv_shrt_frames;	/* Received frames that were to short */
} basic_cntr_t;

/* 82558 extended statistic counters */
typedef struct _ext_cntr_t {
	u32 xmt_fc_frames;
	u32 rcv_fc_frames;
	u32 rcv_fc_unsupported;
} ext_cntr_t;

/* 82559 TCO statistic counters */
typedef struct _tco_cntr_t {
	u16 xmt_tco_frames;
	u16 rcv_tco_frames;
} tco_cntr_t;

/* Structures to access thet physical dump area */
/* Use one of these types, according to the statisitcal counters mode,
   to cast the pointer to the physical dump area and access the cmd_complete
   DWORD. */

/* 557-mode : only basic counters + cmd_complete */
typedef struct _err_cntr_557_t {
	basic_cntr_t basic_stats;
	u32 cmd_complete;
} err_cntr_557_t;

/* 558-mode : basic + extended counters + cmd_complete */
typedef struct _err_cntr_558_t {
	basic_cntr_t basic_stats;
	ext_cntr_t extended_stats;
	u32 cmd_complete;
} err_cntr_558_t;

/* 559-mode : basic + extended + TCO counters + cmd_complete */
typedef struct _err_cntr_559_t {
	basic_cntr_t basic_stats;
	ext_cntr_t extended_stats;
	tco_cntr_t tco_stats;
	u32 cmd_complete;
} err_cntr_559_t;

/* This typedef defines the struct needed to hold the largest number of counters */
typedef err_cntr_559_t max_counters_t;

/* Different statistical-counters mode the controller may be in */
typedef enum _stat_mode_t {
	E100_BASIC_STATS = 0,	/* 82557 stats : 16 counters / 16 dw */
	E100_EXTENDED_STATS,	/* 82558 stats : 19 counters / 19 dw */
	E100_TCO_STATS		/* 82559 stats : 21 counters / 20 dw */
} stat_mode_t;

/* dump statistical counters complete codes */
#define DUMP_STAT_COMPLETED	0xA005
#define DUMP_RST_STAT_COMPLETED	0xA007

/* Command Block (CB) Generic Header Structure*/
typedef struct _cb_header_t {
	u16 cb_status;	/* Command Block Status */
	u16 cb_cmd;	/* Command Block Command */
	u32 cb_lnk_ptr;	/* Link To Next CB */
} cb_header_t __attribute__ ((__packed__));

//* Individual Address Command Block (IA_CB)*/
typedef struct _ia_cb_t {
	cb_header_t ia_cb_hdr;
	u8 ia_addr[ETH_ALEN];
} ia_cb_t __attribute__ ((__packed__));

/* Configure Command Block (CONFIG_CB)*/
typedef struct _config_cb_t {
	cb_header_t cfg_cbhdr;
	u8 cfg_byte[CB_CFIG_BYTE_COUNT + CB_CFIG_D102_BYTE_COUNT];
} config_cb_t __attribute__ ((__packed__));

/* MultiCast Command Block (MULTICAST_CB)*/
typedef struct _multicast_cb_t {
	cb_header_t mc_cbhdr;
	u16 mc_count;	/* Number of multicast addresses */
	u8 mc_addr[(ETH_ALEN * MAX_MULTICAST_ADDRS)];
} mltcst_cb_t __attribute__ ((__packed__));

#define UCODE_MAX_DWORDS	134
/* Load Microcode Command Block (LOAD_UCODE_CB)*/
typedef struct _load_ucode_cb_t {
	cb_header_t load_ucode_cbhdr;
	u32 ucode_dword[UCODE_MAX_DWORDS];
} load_ucode_cb_t __attribute__ ((__packed__));

/* Load Programmable Filter Data*/
typedef struct _filter_cb_t {
	cb_header_t filter_cb_hdr;
	u32 filter_data[MAX_FILTER];
} filter_cb_t __attribute__ ((__packed__));

/* NON_TRANSMIT_CB -- Generic Non-Transmit Command Block 
 */
typedef struct _nxmit_cb_t {
	union {
		config_cb_t config;
		ia_cb_t setup;
		load_ucode_cb_t load_ucode;
		mltcst_cb_t multicast;
		filter_cb_t filter;
	} ntcb;
} nxmit_cb_t __attribute__ ((__packed__));

/*Block for queuing for postponed execution of the non-transmit commands*/
typedef struct _nxmit_cb_entry_t {
	struct list_head list_elem;
	nxmit_cb_t *non_tx_cmd;
	dma_addr_t dma_addr;
	unsigned long expiration_time;
} nxmit_cb_entry_t;

/* States for postponed non tx commands execution */
typedef enum _non_tx_cmd_state_t {
	E100_NON_TX_IDLE = 0,	/* No queued NON-TX commands */
	E100_WAIT_TX_FINISH,	/* Wait for completion of the TX activities */
	E100_WAIT_NON_TX_FINISH	/* Wait for completion of the non TX command */
} non_tx_cmd_state_t;

/* some defines for the ipcb */
#define IPCB_IP_CHECKSUM_ENABLE 	BIT_4
#define IPCB_TCPUDP_CHECKSUM_ENABLE	BIT_5
#define IPCB_TCP_PACKET 		BIT_6
#define IPCB_LARGESEND_ENABLE 		BIT_7
#define IPCB_HARDWAREPARSING_ENABLE	BIT_0
#define IPCB_INSERTVLAN_ENABLE 		BIT_1
#define IPCB_IP_ACTIVATION_DEFAULT      IPCB_HARDWAREPARSING_ENABLE

#define FOLD_CSUM(_XSUM)  ((((_XSUM << 16) | (_XSUM >> 16)) + _XSUM) >> 16)

/* Transmit Buffer Descriptor (TBD)*/
typedef struct _tbd_t {
	u32 tbd_buf_addr;	/* Physical Transmit Buffer Address */
	u16 tbd_buf_cnt;	/* Actual Count Of Bytes */
	u16 padd;
} tbd_t __attribute__ ((__packed__));

/* d102 specific fields */
typedef struct _tcb_ipcb_t {
	u16 schedule_low;
	u8 ip_schedule;
	u8 ip_activation_high;
	u16 vlan;
	u8 ip_header_offset;
	u8 tcp_header_offset;
	union {
		u32 sec_rec_phys_addr;