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📄 class.ptf

📁 VGA Component for Altera SOPC Builder on DE2
💻 PTF
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#
# This class.ptf file built by Component Editor
# 2006.10.04.13:54:21
#
# DO NOT MODIFY THIS FILE
# If you hand-modify this file you will likely
# interfere with Component Editor's ability to
# read and edit it. And then Component Editor
# will overwrite your changes anyway. So, for
# the very best results, just relax and
# DO NOT MODIFY THIS FILE
#
CLASS altera_up_avalon_vga
{
	CB_GENERATOR 
	{
		HDL_FILES 
		{
			FILE 
			{
				use_in_simulation = "1";
				use_in_synthesis = "1";
				type = "verilog";
				filepath = "hdl/Altera_UP_128_Character_Rom.v";
			}
			FILE 
			{
				use_in_simulation = "1";
				use_in_synthesis = "1";
				type = "verilog";
				filepath = "hdl/Altera_UP_Character_Buffer.v";
			}
			FILE 
			{
				use_in_simulation = "1";
				use_in_synthesis = "1";
				type = "verilog";
				filepath = "hdl/Altera_UP_Pixel_Buffer.v";
			}
			FILE 
			{
				use_in_simulation = "1";
				use_in_synthesis = "1";
				type = "verilog";
				filepath = "hdl/Altera_UP_VGA_DAC.v";
			}
			FILE 
			{
				use_in_simulation = "1";
				use_in_synthesis = "1";
				type = "verilog";
				filepath = "hdl/Altera_UP_Avalon_SRAM.v";
			}
			FILE 
			{
				use_in_simulation = "1";
				use_in_synthesis = "1";
				type = "verilog";
				filepath = "hdl/Altera_UP_Avalon_VGA.v";
			}
		}
		OTHER_FILES
		{
			FILE
			{
				filepath = "hdl/Char_Mode_Rom_128.mif";
			}
#			FILE
#			{
#				filepath = "hdl/Screen_Small.mif";
#			}
#			FILE
#			{
#				filepath = "hdl/Screen_Large.mif";
#			}
		}
		top_module_name = "Altera_UP_Avalon_VGA.v:Altera_UP_Avalon_VGA";
		emit_system_h = "0";
		LIBRARIES 
		{
		}
	}
   MODULE_DEFAULTS global_signals
   {
      class = "altera_up_avalon_vga";
      class_version = "6.0";
      SYSTEM_BUILDER_INFO 
      {
         Instantiate_In_System_Module = "1";
         Has_Clock = "1";
         Default_Module_Name = "vga";
         Top_Level_Ports_Are_Enumerated = "1";
      }
      COMPONENT_BUILDER 
      {
         GLS_SETTINGS 
         {
         }
      }
      PORT_WIRING 
      {
         PORT reset
         {
            width = "1";
            width_expression = "";
            direction = "input";
            type = "reset";
            is_shared = "0";
            vhdl_record_name = "";
            vhdl_record_type = "";
         }
         PORT vga_dac_clk
         {
            width = "1";
            width_expression = "";
            direction = "input";
            type = "clk";
            is_shared = "0";
            vhdl_record_name = "";
            vhdl_record_type = "";
         }
         PORT VGA_BLANK
         {
            width = "1";
            width_expression = "";
            direction = "output";
            type = "export";
            is_shared = "0";
            vhdl_record_name = "";
            vhdl_record_type = "";
         }
         PORT VGA_SYNC
         {
            width = "1";
            width_expression = "";
            direction = "output";
            type = "export";
            is_shared = "0";
            vhdl_record_name = "";
            vhdl_record_type = "";
         }
         PORT VGA_HS
         {
            width = "1";
            width_expression = "";
            direction = "output";
            type = "export";
            is_shared = "0";
            vhdl_record_name = "";
            vhdl_record_type = "";
         }
         PORT VGA_VS
         {
            width = "1";
            width_expression = "";
            direction = "output";
            type = "export";
            is_shared = "0";
            vhdl_record_name = "";
            vhdl_record_type = "";
         }
         PORT VGA_R
         {
            width = "-1";
            width_expression = "((DAC_COLOR_WIDTH - 1)) - (0) + 1";
            direction = "output";
            type = "export";
            is_shared = "0";
            vhdl_record_name = "";
            vhdl_record_type = "";
         }
         PORT VGA_G
         {
            width = "-1";
            width_expression = "((DAC_COLOR_WIDTH - 1)) - (0) + 1";
            direction = "output";
            type = "export";
            is_shared = "0";
            vhdl_record_name = "";
            vhdl_record_type = "";
         }
         PORT VGA_B
         {
            width = "-1";
            width_expression = "((DAC_COLOR_WIDTH - 1)) - (0) + 1";
            direction = "output";
            type = "export";
            is_shared = "0";
            vhdl_record_name = "";
            vhdl_record_type = "";
         }
      }
      WIZARD_SCRIPT_ARGUMENTS 
      {
		# System.h Parameters
		# Pixel Mode
		ALT_UP_VGA_PIX_X_RESOLUTION		= "80";
		ALT_UP_VGA_PIX_Y_RESOLUTION 	= "60";
		ALT_UP_VGA_PIX_X_LENGTH  		= "7";
		ALT_UP_VGA_PIX_Y_LENGTH  		= "6";
		 
		ALT_UP_VGA_PIX_COLOR_MASK 		= "0x000001FF";
		 
		ALT_UP_VGA_PIX_X_COORD_MSK 		= "0x000001FC";
		ALT_UP_VGA_PIX_X_COORD_OFST 	= "2";
		 
		ALT_UP_VGA_PIX_Y_COORD_MSK 		= "0x00007E00";
		ALT_UP_VGA_PIX_Y_COORD_OFST 	= "9";
 
		# Character Mode
		ALT_UP_VGA_CHAR_X_RESOLUTION	= "80";
		ALT_UP_VGA_CHAR_Y_RESOLUTION	= "60";
		ALT_UP_VGA_CHAR_X_LENGTH		= "7";
		ALT_UP_VGA_CHAR_Y_LENGTH		= "6";
		 
		ALT_UP_VGA_CHAR_X_COORD_MSK		= "0x000001FC";
		ALT_UP_VGA_CHAR_X_COORD_OFST	= "2";
		 
		ALT_UP_VGA_CHAR_Y_COORD_MSK		= "0x00007E00";
		ALT_UP_VGA_CHAR_Y_COORD_OFST	= "9";

         hdl_parameters 
         {
			VGA_MODE			= 1;

			CHAR_COLOUR_BITS	= 1;
			CHAR_RESOLUTION		= 1;
         }
		 PARAMETERS
		 {

			VGA_COLOUR_BITS		= 16;
			VGA_RESOLUTION		= 8;
			
			# Char Mode Parameters
			CHAR_ADDR_WIDTH			= "13";
			CHAR_DATA_WIDTH			= "16";
			CHAR_BUFFER_SIZE		= "4800";
			CHAR_ADDR_INCREMENT		= "13'h0001";

			Y_COORD_SMALL_OFFSET	= "4'h0";
			Y_COORD_LARGE_OFFSET	= "6'h00";

			CHAR_BITS				= "4";
			ENLARGE_CHAR			= "0";

			X_BITS					= "7";
			Y_BITS					= "6";

			BLANK_CHAR				= "16'h0020";
			CHAR_COLOR_MODE			= "1"; 
		 }
		 SECTIONS
		 {
			USE_OVERLAY_MODE	= 0;
			USE_PIXEL_MODE		= 1;
			USE_CHAR_MODE		= 0;

			USE_BACK_BUFFER		= 0;
		 }
      }
      SIMULATION 
      {
         DISPLAY 
         {
         }
      }
      SLAVE avalon_pixel_slave
      {
         SYSTEM_BUILDER_INFO 
         {
            Bus_Type			= "avalon";
            Has_Clock			= "1";

            Address_Group		= "1";
            Address_Width		= "-1";
            Address_Alignment	= "dynamic";
			#	Address_Span		= "16384";
            Data_Width			= "32";
			
            Has_Base_Address	= "1";
            Has_IRQ				= "0";
			
            Setup_Time			= "0cycles";
            Hold_Time			= "0cycles";
            Read_Wait_States	= "2cycles";
            Write_Wait_States	= "2cycles";
            Read_Latency		= "2";

            Maximum_Pending_Read_Transactions	= "0";
            Active_CS_Through_Read_Latency		= "0";
            Minimum_Uninterrupted_Run_Length	= "1";
			
            Is_Printable_Device	= "0";
            Is_Memory_Device	= "0";
            Is_Readable			= "1";
            Is_Writable			= "1";
 			Is_Channel			= "1";
			Is_Enabled			= "1";
         }
         PORT_WIRING 
         {
            PORT pixel_clk
            {
               width = "1";
               width_expression = "";
               direction = "input";
               type = "clk";
               is_shared = "0";
               vhdl_record_name = "";
               vhdl_record_type = "";
            }
            PORT pixel_address
            {
               width = "-1";
               width_expression = "((PIXEL_ADDR_WIDTH - 1)) - (0) + 1";
               direction = "input";
               type = "address";
               is_shared = "0";
               vhdl_record_name = "";
               vhdl_record_type = "";
            }
            PORT pixel_chipselect
            {
               width = "1";
               width_expression = "";
               direction = "input";
               type = "chipselect";
               is_shared = "0";
               vhdl_record_name = "";
               vhdl_record_type = "";
            }
            PORT pixel_read
            {
               width = "1";
               width_expression = "";
               direction = "input";
               type = "read";
               is_shared = "0";
               vhdl_record_name = "";
               vhdl_record_type = "";
            }
            PORT pixel_write
            {
               width = "1";
               width_expression = "";
               direction = "input";
               type = "write";
               is_shared = "0";
               vhdl_record_name = "";
               vhdl_record_type = "";
            }
            PORT pixel_writedata
            {
               width = "32";
               width_expression = "";
               direction = "input";
               type = "writedata";
               is_shared = "0";
               vhdl_record_name = "";
               vhdl_record_type = "";
            }
            PORT pixel_readdata
            {
               width = "32";
               width_expression = "";
               direction = "output";
               type = "readdata";
               is_shared = "0";
               vhdl_record_name = "";
               vhdl_record_type = "";
            }
            PORT SRAM_DQ
            {
               width = "16";
               width_expression = "";
               direction = "inout";
               type = "export";
               is_shared = "0";
               vhdl_record_name = "";
               vhdl_record_type = "";
            }
            PORT SRAM_ADDR
            {
               width = "18";
               width_expression = "";
               direction = "output";
               type = "export";
               is_shared = "0";
               vhdl_record_name = "";
               vhdl_record_type = "";
            }
            PORT SRAM_LB_N
            {
               width = "1";
               width_expression = "";
               direction = "output";
               type = "export";
               is_shared = "0";
               vhdl_record_name = "";
               vhdl_record_type = "";
            }
            PORT SRAM_UB_N
            {
               width = "1";
               width_expression = "";
               direction = "output";
               type = "export";
               is_shared = "0";
               vhdl_record_name = "";
               vhdl_record_type = "";
            }
            PORT SRAM_CE_N
            {
               width = "1";
               width_expression = "";
               direction = "output";
               type = "export";
               is_shared = "0";
               vhdl_record_name = "";
               vhdl_record_type = "";
            }
            PORT SRAM_OE_N
            {
               width = "1";
               width_expression = "";
               direction = "output";
               type = "export";

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