📄 adp_if.h
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/* **************************************************************************************
* Copyright (c) 2002 ZORAN Corporation, All Rights Reserved
* THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF ZORAN CORPORATION
*
* File: $Workfile: adp_if.h $
*
* Description:
* ============
* ADP driver low level.
* Log:
* ====
* Last Modified by $Author: $ at $Modtime: $
****************************************************************************************
* Updates:
****************************************************************************************
*
* $Log: /I96/I96_Reference/Decoder/low_level/adp_if.h $
*****************************************************************************************/
#include "Config.h" // Global Configuration - do not remove!
/////////////////////////////////////////////////////////////////////////////////////////////////
// Include files
#include <conio.h>
#include "spram.h"
#include "Kernel\uITRON\rtos.h"
#include "Kernel\Ker_API.H"
#include "Include\SysDefs.h"
#include "CPU\v186t\v186t.h"
#include "Decoder_setting\sdram_config.h"
#include "mcu_api.h"
#include "mem_mngr.h"
#define ADP_COMPRESSED
/////////////////////////////////////////////////////////////////////////////////////////////////
// Constants & Enumerations
// ADP flag event bits
#define EVENTFLG_ADP_RESPONSE 1
// SDRAM buffers address
#define ADP_SDRAM_OVERLAY_ADDR (MEM_MngrSt.mapInfo->memCodeBuff[MEM_BUFF_APP_ID].ulStartAddress)
#define ADP_SDRAM_OVERLAY_SIZE (MEM_MngrSt.mapInfo->memAppBuffPortion.ulOverlaySize) // WORDS
#define ADP_SDRAM_APP_START_ADDR (ADP_SDRAM_OVERLAY_ADDR + ADP_SDRAM_OVERLAY_SIZE)
#define ADP_SDRAM_APP_SIZE_IN_WORDS (MEM_MngrSt.mapInfo->memAppBuffPortion.ulDataSize)
#define ADP_SDRAM_VCB_ADDR MEM_MngrSt.mapInfo->memCodeBuff[MEM_BUFF_VCB_ID].ulStartAddress
#define ADP_SDRAM_VCB_SIZE MEM_MngrSt.mapInfo->memCodeBuff[MEM_BUFF_VCB_ID].ulSize
#ifdef JPEG_MP3_ENABLE
#define ADP_SDRAM_JPEGMP3_JPEG_ADDR (ADP_SDRAM_APP_START_ADDR+6600)
#define ADP_SDRAM_JPEGMP3_MP3_ADDR (ADP_SDRAM_APP_START_ADDR)
#define ADP_SDRAM_JPEGMP3_PCM_ADDR (ADP_SDRAM_JPEGMP3_MP3_ADDR+6600+6000)
#endif
typedef enum
{
CMD_FAIL = -1,
CMD_SUCCESS = 0
} CMD_RESULT;
// SP RAM const Address
typedef enum
{
ADP_C2AFIFO_FULLNESS_SP_ADDR = ADP_SP_RAM_BASE_ADDRESS,
ADP_A2CFIFO_FULLNESS_SP_ADDR = (ADP_SP_RAM_BASE_ADDRESS + 2),
ADP_SHARE_MEM_BASE_SP_ADDR = (ADP_A2CFIFO_FULLNESS_SP_ADDR + 2)
}ADP_SP_ADDRESS;
// Default sizes ( in words ) for shared memory .
// Those sizes are considered as the FIFO's minimum sizes (restricted by ADP response's length).
#define ADP_SHARED_MEM_DEFAULT_SIZE 30
#define ADP_C2AFIFO_DEFAULT_SIZE 16
#define ADP_A2CFIFO_DEFAULT_SIZE 16
//length of ADP response <= A2C Fifo size. minus 2 for: OPCODE word + N parameter
//Since status is not used in current code, buffer is only in the size of 1 word.
//#define ADP_MAX_STATUS_SIZE ADP_A2CFIFO_DEFAULT_SIZE -2
#define ADP_MAX_STATUS_SIZE 1
// offsets in the CPU-ADP shared memory
//3 first words are FFC and 2 RTI. then, shared words 3 - (shared memory size-1).
#define SHARED_MEM_FFC_OFFSET 0
#define SHARED_MEM_DECODER_RTI1_OFFSET 1 // RTI is always 32 bit. set to start task the first one
#define SHARED_MEM_DECODER_RTI2_OFFSET 2
#define SHARED_MEM_DECODER_RTI3_OFFSET 3
#define SHARED_MEM_WORD4_OFFSET 4
#define SHARED_MEM_WORD5_OFFSET 5
#define SHARED_MEM_WORD6_OFFSET 6
#define SHARED_MEM_WORD7_OFFSET 7
#define SHARED_MEM_WORD8_OFFSET 8
#define SHARED_MEM_WORD9_OFFSET 9
#define SHARED_MEM_WORD10_OFFSET 10
#define SHARED_MEM_WORD11_OFFSET 11
#define SHARED_MEM_WORD12_OFFSET 12
#define SHARED_MEM_WORD13_OFFSET 13
#define SHARED_MEM_WORD14_OFFSET 14
#define SHARED_MEM_WORD15_OFFSET 15
#define SHARED_MEM_WORD16_OFFSET 16
#define SHARED_MEM_WORD17_OFFSET 17
#define SHARED_MEM_WORD18_OFFSET 18
#define SHARED_MEM_WORD19_OFFSET 19
//addresses in shared memory
typedef enum
{
ADP_CPU_FEEDBACK_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_FFC_OFFSET*2),
DECODER_RTI1_WORD_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_DECODER_RTI1_OFFSET*2),
DECODER_RTI2_WORD_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_DECODER_RTI2_OFFSET*2),
DECODER_RTI3_WORD_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_DECODER_RTI3_OFFSET*2),
SHARED_WORD4_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD4_OFFSET*2),
SHARED_WORD5_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD5_OFFSET*2),
SHARED_WORD6_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD6_OFFSET*2),
SHARED_WORD7_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD7_OFFSET*2),
SHARED_WORD8_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD8_OFFSET*2),
SHARED_WORD9_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD9_OFFSET*2),
SHARED_WORD10_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD10_OFFSET*2),
SHARED_WORD11_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD11_OFFSET*2),
SHARED_WORD12_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD12_OFFSET*2),
SHARED_WORD13_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD13_OFFSET*2),
SHARED_WORD14_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD14_OFFSET*2),
SHARED_WORD15_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD15_OFFSET*2),
SHARED_WORD16_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD16_OFFSET*2),
SHARED_WORD17_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD17_OFFSET*2),
SHARED_WORD18_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD18_OFFSET*2),
SHARED_WORD19_SP_ADDR = (ADP_SHARE_MEM_BASE_SP_ADDR + SHARED_MEM_WORD19_OFFSET*2),
SUBCODE_WORD1_SP_ADDR = SHARED_WORD4_SP_ADDR,
MP3_CLIP_TIME_ADDR = SHARED_WORD4_SP_ADDR,
#ifdef DDX_TEST
DDXC_STATUS_SP_ADDR = SHARED_WORD4_SP_ADDR,
DDXC_H1_MSB_SP_ADDR = SHARED_WORD5_SP_ADDR,
DDXC_H1_LSB_SP_ADDR = SHARED_WORD6_SP_ADDR,
DDXC_H2_MSB_SP_ADDR = SHARED_WORD7_SP_ADDR,
DDXC_H2_LSB_SP_ADDR = SHARED_WORD8_SP_ADDR,
#endif
SUBCODE_WORD2_SP_ADDR = SHARED_WORD5_SP_ADDR,
SUBCODE_WORD3_SP_ADDR = SHARED_WORD6_SP_ADDR,
SUBCODE_WORD4_SP_ADDR = SHARED_WORD7_SP_ADDR,
SUBCODE_WORD5_SP_ADDR = SHARED_WORD8_SP_ADDR,
SUBCODE_WORD6_SP_ADDR = SHARED_WORD9_SP_ADDR,
CD_DETECTION_ADDR = SHARED_WORD10_SP_ADDR,
JPEG_DEC_STATUS_SP_ADDR = SHARED_WORD11_SP_ADDR,
JPEG_PIC_WIDTH_SIZE_SP_ADDR = SHARED_WORD12_SP_ADDR,
JPEG_PIC_HEIGHT_SIZE_SP_ADDR = SHARED_WORD13_SP_ADDR,
JPEG_DEC_DONE_SP_ADDR = SHARED_WORD14_SP_ADDR,
JPEG_TRANS_READY_SP_ADDR = SHARED_WORD15_SP_ADDR,
}SHARED_MEMORY_SEGMENTS_ADDRESS;
// defines for 8bits bitmap register in shared memory (in case ADP-CPU sync is needed while using shared memory)
typedef enum
{
JPEG_PIC_SIZE_BMP_BIT = 0x4,
CDDA_SUBCODE_WORDS_BMP_BIT = 0x8,
JPEG_READY_TO_TRANS_BMP_BIT = 0x10,
JPEG_DECODE_DONE_BMP_BIT = 0x20,
CLIP_TIME_CLIP_END_BMP_BIT = 0x40,
}SHARED_MEM_BITMAP_BITS_OPTION;
/*============================ RTI defines ============================*/
// RTI 1 bits defines
#define RTI1_AVAILABLE_POST_PROCESSES_MASK 0xfff0 // see ACTIVE_POST_PROC_OPTIONS enum
#define RTI1_SAMPLING_RATE_MASK 0x000f // see SAMPLING_RATE enum
// RTI 2 bits defines
#define RTI2_TASK_FAST_STATUS_MASK 0x000f // see STATUS_REPLAY_BY_RTI_WORD enum
#define RTI2_ACTIVE_POST_PROCESS_MASK 0xfff0 // see AVAILABLE_POST_PROC_OPTIONS enum
#define OPERATION_ERROR_STATUS 0x100 //operation error on status command
#define RESET_FFC_WORD_PATTERN 0x0000
#define INIT_SHARED_MEM_PATTERN 0xffff
#define TASK_TERMINATED INIT_SHARED_MEM_PATTERN
/*====================== ADP commands ========================== */
/* group 0 */
#define ADP_COMMAND_NOP 0x0000
#define ADP_COMMAND_PLAY 0x0100
#define ADP_COMMAND_STOP 0x0200
#define ADP_COMMAND_STOP_FLUSH 0x0300
#define ADP_COMMAND_MUTE 0x0400
#define ADP_COMMAND_UNMUTE 0x0500
#define ADP_COMMAND_AVS_MODE 0x0600
#define ADP_COMMAND_AV_TOLERANCE 0x0700
#define ADP_COMMAND_PTS_VALUE 0x0800
/* group 1 */
#define ADP_COMMAND_START_TASK 0x2000
#define ADP_COMMAND_TERMINATE_TASK 0x2100
#define ADP_COMMAND_SW_RESET 0x2200
#define ADP_COMMAND_POWER_DOWN 0x2300
#define ADP_COMMAND_POWER_UP 0x2400
/* group 2 */
#define ADP_COMMAND_APPLICATION 0x4000
#define ADP_COMMAND_JPEG_APPLICATION 0x4100
#define ADP_COMMAND_JPEG_PLAYBACK_CTRL 0x4200
#define ADP_COMMAND_BASSCFG 0x4100
#define ADP_COMMAND_LPCM_DOWNMIX 0x4500
#define ADP_COMMAND_KARAOKE_DOWNMIX 0x4500
#define ADP_COMMAND_KARAOKE 0x4600
#define ADP_COMMAND_MIC 0x4700
/* group 3*/
#define ADP_COMMAND_IOCFG 0x6000
#define ADP_COMMAND_ADTOTABLE 0x6100
#define ADP_COMMAND_ADTOCFG 0x6200
#define ADP_COMMAND_SPDIFSCFG 0x6300
#define ADP_COMMAND_SETIO 0x6400
#define ADP_COMMAND_C2AIFMAPPING 0x6500
/* group 4 */
#define ADP_COMMAND_VERSION 0x8000
#define ADP_COMMAND_STATUS 0x8100
#define ADP_COMMAND_PEEK 0x8200
#define ADP_COMMAND_GETIO 0x8300
/* group 5 */
#define ADP_COMMAND_INTERPRET 0xa000
#define ADP_COMMAND_POKE 0xa100
#define ADP_COMMAND_BOOT 0xa200
/* group 6 */
#define DDXCTRL_DDX_CMD 0xc000
#define DDXCFG_DDX_CMD 0xc100
#define MUTEDDX_DDX_CMD 0xc200
#define CHVBYPASS_DDX_CMD 0xc300
#define CHVOLUME_DDX_CMD 0xc400
#define CHTRIM_DDX_CMD 0xc500
#define MVOLUME_DDX_CMD 0xc600
#define DRCONTROL_DDX_CMD 0xc700
typedef UINT16 CPU_ADP_OP_CODES;
//defines for ADP response procedure
#define CPU_ADP_COMMAND_MASK 0xff00
#define A2CFIFO_CMD_BITS_MASK CPU_ADP_COMMAND_MASK
#define RESPONSE_BITS 0x00ff
//Number of NOP command sent to ADP in case of error recovery
#define MAX_NOP_COMMANDS 256
/*========== defines for fast feedback (FFC) =====================*/
//ADP status defines after reading command from CPU
typedef enum
{
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