hsystem.c

ct952 source code use for Digital Frame Photo

#include "winav.h"
#include "ctkav.h"
#include "ctkav_mcu.h"
#include "hal.h"
#include "hdecoder.h"
#include "disp.h"
#include "hio.h"
#include "hsys.h"
#include "hdevice.h"
#include "romld.h"
// LLY2.36, include "spflash.h" to adjust SPI Flash clock
#include "spflash.h"
// LLY2.36, include "input.h" to change IR checking mode
#include "input.h"

#ifdef EMU_RTC
#include "rtcdrv.h"
#endif
#ifdef SUPPORT_USB
#include "srcfilter.h"
#include "usbwrap.h"
#endif //
extern void    INT_Init( void );

// LLY2.15, add varible to keep system clock
DWORD   __dwSysClk;
WIN_PARAMETER   MainVideoInfo;  // declare here, as gdi will use it.


void    HAL_StartSystem(void)
{
    // LLY2.22, give CPU_SPEED directly for MPLL setting
    HAL_ClockSet(MODE_MPLL, CPU_SPEED);

    // LLY2.15, give default value for system clock
    // And, prescaler reload value will reference it.
    __dwSysClk = CPU_SPEED;

    // LLY2.13, base on desired CPU working speed to program prescaler reload value
    // prescaler_reload = (cpu_speed-1)/2
    // Notice: only necessary to give the value of MHz part
    REG_PLAT_PRESCALER_RELOAD = ((__dwSysClk/1000000)-1)/2;

    // LLY2.21, porting Chuan's code to calculate time1 reload value base on system tick
    REG_PLAT_TIMER1_RELOAD = (1000 * SYSTEM_TICK) - 1;

    // LLY1.05, always enable cache power saving feature
    REG_PLAT_CACHE_CONTROL |= CACHE_DCACHE_POWER_SAVING;

    // J500CSC_111, clear the semaphore at first start
    MACRO_PLAT_KEY_UNLOCK( );

    // LLY2.16, remove the procedure from HAL_StartSystem(),
    // Notice: it must be initialize as earily as possible since servo init may use expand GPIO
    HAL_Init_ExpGPIO();

    // LLY2.61, initial necessary register to control SCART PWM
#ifdef  SUPPORT_SCART_IF
#ifdef  SUPPORT_SCART_PWM_CTRL
    HAL_SCART_PWM_Init(PIN_SCART_PWM);
#endif  // #ifdef SUPPORT_SCART_PWM_CTRL
#endif  // #ifdef SUPPORT_SCART_IF

    // LLY2.60, only do DVD/DVB pin switching while solution need this pin to switch mode
    // ex. it's un-necessary and no pin to do it @ DMP952A solution.
    // Notice: can't use SUPPORT_SERVO_SOURCE && SUPPORT_STB for checking
    //         since CT909R system only servo source, not NIM solution
    //         but it still need do this pin switching.
    // LLY2.38, remove DVD/ DVB switching procedure from HAL_InitPlatForm()
    // Since, it must be done as earily as possible than servo init.
    // Otherwise, servo action can't work.
    // LLY2.15, set DVD/ DVB switch mode as DVD while power-on
    // Otherwise, servo signal can't come-in
#ifndef  NO_DVD_DVB_SWITCHING
    // Notice: must check why the action will fail @ CT909S EVAL board.
#if (DECODER_SYSTEM != DVD909S_EVAL)
    HAL_WriteGPIO(DVD_DVB_SWITCH_GRP, PIN_DVD_DVB_SWITCH, 1);
#endif  // #if (DECODER_SYSTEM != DVD909S_EVAL)
#endif  // #ifdef  DO_DVD_DVB_SWITCHING

}


//  *********************************************************************
//  Function    :   INITIAL_uProcessor
//  Description :   The initalization of uProcessor; Set IRQ and Timer
//  Arguments   :   NONE
//  Return      :   NONE
//  Side Effect :   After the function, will enable Interrupt...
//  *********************************************************************
BYTE HAL_InitPlatForm(void)
{
#ifdef  SYSTEM_ECOS
    DWORD   dwAck=0;
    DWORD   dwSaveInt;
    BYTE    bIndx;
    DWORD   dwTimeStart;
    DWORD   dwREG_PLAT_TIMER1_RELOAD;

// LLY2.17, porting Chuan's code to remove un-necessary code if not AP_FRAMEWORK
#ifndef AP_FRAMEWORK

    // Chuan1.20,  Disable PROC2 debug information.
    // Serial debug tool wll resync again later
    REG_DBG_PROC2FLAG = 0;

    //kevin0.95, clear shared memory only when H/W power on
    for ( bIndx=0; bIndx<32; bIndx++)
        (*(volatile DWORD *)(0x80000780+bIndx*4)) = 0;

    // J500CSC_2.05, when current is boot from small boot code, enable or disable
    // audio code protection depends on RUNTIME_UNZIP_AUDIO_CODE is defined or not.
    if( PLAT_CODE_PROTECTION == SPARC_NOP_INSTRUCTION )
    {
#ifdef  RUNTIME_UNZIP_AUDIO_CODE
        PLAT_CODE_PROTECTION |= PLAT_CODE_PROTECT_PROC2;
#else
        PLAT_CODE_PROTECTION &= (~PLAT_CODE_PROTECT_PROC2);
#endif  // RUNTIME_UNZIP_AUDIO_CODE
    }

    // J500CSC_108, arrange the memory protection mechanism
    // Added following setting for preserve the compliance with previous version
    if( PLAT_CODE_PROTECTION & PLAT_CODE_PROTECT_PROC2 )
    {
        (*(volatile DWORD *)0x80000784) |= 0x80000000;
    }
    else
    {
        (*(volatile DWORD *)0x80000784) &= (~0x80000000);
    }

    // Chuan0.64, Set The start address of PROC2 and SP
    // After release PROC2, the boot code will look the two address and do the setting.
    // If the address isn't 0x40xxxxxx, boot code will be trapped.
    PROC2_SP = DS_PROC2_SP;
    PROC2_STARTADR = DS_PROC2_STARTADDR;

#ifndef NO_PROC2
// J500CSC_2.05, for supporting runtime decompressed audio code
    HAL_LoadAudioCode( HAL_AUDIO_AC3, (PDWORD) DS_AUDIO_TABLE_ST, (PBYTE) DS_PROC2_STARTADDR,
            (PBYTE) DS_UNZIP_BUF_ST );

#endif  //#ifndef NO_PROC2

    // LLY2.21, Porting Chuan's code to keep time1 value first
    // Since, it will be updated by PROC2
    dwREG_PLAT_TIMER1_RELOAD = REG_PLAT_TIMER1_RELOAD;

    // LLY1.06, it's un-necessary to set PROC2 SP & STARTADDR since nobody reference it
    // ie. After standard library (eCos package v1.1.1)
    //(*(volatile DWORD *) (0x403ffff8)) = DS_PROC2_SP;
    //(*(volatile DWORD *) (0x403ffffc)) = DS_PROC2_STARTADDR;

    // Chuan0.64, Due Flash and ATAPI use the same control pin, the initialization of ATAPI need
    // wait PROC2 located at DRAM(0x40xxxxxx).
    // Therefore, we need wait the ack of HAL_AM_AUDIO_START.
    // Lack the timeout flow?
    // Notice: The clock doesn't attach yet! Use real timer for timeout control or attach first.
    (*(volatile DWORD *)(0x800007e4)) = 0x10003;

    // LLY0.65, porting Chuan code to support DSU 2 debug
#ifdef DEBUG_PROC2
    (*(volatile DWORD *)(DS_PROC2_STARTADDR)) = 0x91d02000;     // ta 0
    (*(volatile DWORD *)(DS_PROC2_STARTADDR+4)) = 0x01000000;   // nop
    (*(volatile DWORD *)(DS_PROC2_STARTADDR+8)) = 0x01000000;   // nop
#endif  // #ifdef DEBUG_PROC2

    // LLY2.15, remove following procedure, since current use API to replace it.
#if 0
    // LLY0.80a, add return code within the last address of our code
    // Just for tester setting breakpointer easiler
#ifdef  SUPPORT_PSNR_TEST
    (*(volatile DWORD *)(0x407FFFF0)) = 0x81c3e008;     // retl
    (*(volatile DWORD *)(0x407FFFF0+4)) = 0x01000000;   // nop
    (*(volatile DWORD *)(0x407FFFF0+8)) = 0x01000000;   // nop
#endif  // #ifdef SUPPORT_PSNR_TEST
#endif  // #if 0

    // LLY1.21-1, set a default address for area 1 code protection. (Used for Proc2)
    // Since, PROC1 will enable area 1 protection early than PROC2 set the desired address.
    MACRO_MCU_WRITE_PROTECTION( 1, 0x40000000, 0x40000000);

    // J500CSC_108, arrange the memory protection mechanism
    // WP0 -> 0x40000008 ~ 0x400AFFF8: .text & .rodata (Proc1 & Video Decoder)
    // WP1 -> 0x400B0000 ~ 0x4011FFF8: Audio Decoder, but just .text & rodata, this is protected
    //                                 by PROC2
    // WP2 -> 0x40800000 ~ 0x4FFFFFF8: out of DRAM size.
    // WP3 -> 0x407E0000 ~ 0x40800000: DS_OSD_FONTTABLE_ST ~ DS_OSD_FONTTABLE_END
    // FONT_TABLE will be protected always.
    // .text & .rodata of PROC1 and PROC2 protected or not depends on the settings at
    // PLAT_CODE_PROTECTION.
    // disable all memory protection
    REG_MCU_WPROTEN = 0;

    // set correct memory ranges for code protection.
    // LLY2.17, porting Chuan's code since re-arrange the memory layout
    // [1] Always protect trap table.
    MACRO_MCU_WRITE_PROTECTION(0, 0x40000000, 0x40001000);

    // [2] Protect PROC1 text, rodata section.
    // MACRO_MCU_WRITE_PROTECTION( 2, DS_PROC1_TEXTADDR_ST, DS_PROC1_TEXTADDR_END );
    {
        //Aron2.36, Get the code protection by __dwCoPoStartAddr, __dwCoPoEndAddr
        //Both two are resided in linker script file
        extern DWORD __dwCoPoStartAddr, __dwCoPoEndAddr;//READ ONLY
        DWORD dwStartAddr, dwEndAddr;
        dwStartAddr = (DWORD)(&__dwCoPoStartAddr);
        dwEndAddr = (DWORD)(&__dwCoPoEndAddr);
        if ((dwStartAddr & 0x40000000) && (dwEndAddr & 0x40000000))
        {
            MACRO_MCU_WRITE_PROTECTION( 2, dwStartAddr, dwEndAddr );
        }
     }

    // [3] LLY1.20, base on DRAM size to do out-of range protection
    // Ref. Design Target Spec-platform.pdf: system configure register 1
    // Notice: 909 supprt 32M ~ 512M
    //         909S support 16M ~ 256M
    // LLY2.56, porting Chuan's code since code protection mechanism is different from CT909G
#ifdef CT909R_IC_SYSTEM
    MACRO_MCU_WRITE_PROTECTION( 4, HAL_GetDRAMSize(), 0x50000000 );
#endif  // #ifdef CT909R_IC_SYSTEM

    // [4] Protect OSD font table area.
    // LLY2.20, porting Alan's code not to protect the font table if necessary
#ifndef UNPROTECT_FONT_TABLE
    MACRO_MCU_WRITE_PROTECTION( 3, DS_OSD_FONTTABLE_ST, DS_OSD_FONTTABLE_END ); //Alan1.00 adds for protecting font table
#endif  // #ifndef UNPROTECT_FONT_TABLE

    // check how many ranges need to be protected
    dwSaveInt = MCU_WRITE_PROTECT_AREA0_ENABLE | MCU_WRITE_PROTECT_AREA3_ENABLE | MCU_WRITE_PROTECT_AREA4_ENABLE;

    // Base on PLAT_CODE_PROTECTION value to check if protect PROC1
    if( PLAT_CODE_PROTECTION & PLAT_CODE_PROTECT_PROC1 )
    {
        dwSaveInt |= MCU_WRITE_PROTECT_AREA2_ENABLE;
    }

    // enable memory protection
    MACRO_MCU_ENABLE_PROTECTION( dwSaveInt );


    OS_REORDER_BARRIER();
    // LLY0.80, add protection while accessing REG_PLAT_RESET_CONTROL
    // Since, it maybe access by another thread or processor
    OS_DISABLE_INTERRUPTS( dwSaveInt );	// Disable INT to avoid different threads accessing

    // LLY2.01, porting Chuan code for NO_PROC2 code
#ifdef NO_PROC2
    REG_PLAT_RESET_CONTROL_ENABLE = PLAT_RESET_PROC2_ENABLE;
    (*(volatile DWORD *)(0x800007e4)) = 0x0;
#else   // #ifdef NO_PROC2
    REG_PLAT_RESET_CONTROL_DISABLE = PLAT_RESET_PROC2_DISABLE;
#endif  // #ifdef NO_PROC2
    OS_RESTORE_INTERRUPTS( dwSaveInt );	// Restore INT.
    OS_REORDER_BARRIER();

// Micky_PORTING_OSWRAP
// Move to INITIAL_System
/*
    // Set Timer earily since next statement will use counter
    __RTC = cyg_real_time_clock();
    cyg_clock_to_counter(__RTC, &__ClockHandle);
*/
    dwTimeStart=OS_GetSysTimer();

#ifdef DEBUG_PROC2
    while(1)
#else  // #ifdef DEBUG_PROC2
    while( (OS_GetSysTimer() - dwTimeStart) < PROC2_RESET_ACK_TIME_OUT)
#endif // #ifdef DEBUG_PROC2
    {
        dwAck = (*(volatile DWORD *)(0x800007e4));
        dwAck >>= 16;

        // Process 2 booting ok
        if(dwAck==0)
        {
            break;
        }
    }

    // LLY2.21, Porting Chuan's code to restore time1 value first
    // Since, it will be updated by PROC2
    REG_PLAT_TIMER1_RELOAD = dwREG_PLAT_TIMER1_RELOAD;

    // LLY1.21a, enable area 1 protection for PROC2
    // Notice: this procedure must be done after PROC2 booting ok
    if( PLAT_CODE_PROTECTION & PLAT_CODE_PROTECT_PROC2 )
    {
        // protect any wrong settings by PROC2
        if ((REG_MCU_WP1BASE >= (DS_PROC2_STARTADDR&0x7FFFFFF)) && (REG_MCU_WP1BASE <= (DS_PROC2_SP&0x7FFFFFF)) &&
            (REG_MCU_WP1SIZE >= (DS_PROC2_STARTADDR&0x7FFFFFF)) && (REG_MCU_WP1SIZE <= (DS_PROC2_SP&0x7FFFFFF)) &&
            (REG_MCU_WP1SIZE > REG_MCU_WP1BASE))
        {
            MACRO_MCU_ENABLE_PROTECTION( MCU_WRITE_PROTECT_AREA1_ENABLE );
        }
    }

#endif // #ifndef AP_FRAMEWORK

    REG_PLAT_PROC1_1ST_INT_MASK_ENABLE = INT_SET_ALL;
    REG_PLAT_PROC1_2ND_INT_MASK_ENABLE = INT_SET_ALL;

    REG_PLAT_PROC1_1ST_INT_CLEAR = INT_SET_ALL;
    REG_PLAT_PROC1_2ND_INT_CLEAR = INT_SET_ALL;

    // Chuan0.64, Don't initial the INT of PROC2. Let PROC2 do it.
    /*
    REG_PLAT_PROC2_1ST_INT_MASK_PRIORITY = INT_CLEAR_ALL;
    REG_PLAT_PROC2_1ST_INT_CLEAR = INT_SET_ALL;
    REG_PLAT_PROC2_INT_MASK_PRIORITY = INT_CLEAR_ALL;
    REG_PLAT_PROC2_INT_CLEAR = INT_SET_ALL;
    */

    REG_PLAT_INT_MASK_PRIORITY = (INT_CLEAR_ALL|INT_TIMER1);
    REG_PLAT_INT_CLEAR = (INT_SET_ALL&(~(INT_TIMER1)));

    // Clear STC and Enable.
    // LLY1.05, using API to set STC value
    //REG_PLAT_TIMER3_VALUE = 0;
    DISP_UpdateSTC(0, FALSE);
    REG_PLAT_TIMER3_CONTROL = 2;

#ifndef AP_FRAMEWORK

    // initialize INT for BIU
    REG_BIU_BIUCTL |= BIU_INT_BPINT_EN;
    REG_PLAT_PROC1_2ND_INT_MASK_DISABLE = INT_PROC1_2ND_BIU;

    // initialize INT for MCU_BSRD
    REG_PLAT_PROC1_2ND_INT_MASK_DISABLE = INT_PROC1_2ND_MCU_BSRD;

    REG_MCU_REMEN = (REG_MCU_REMEN & MCU_BIT_STREAM_TYPE_UNMASK) | MCU_REMAINDER_ENABLE_VIDEO_BUF | MCU_REMAINDER_ENABLE_AUDIO_BUF0 | MCU_REMAINDER_ENABLE_SP1_BUF
            | MCU_REMAINDER_ENABLE_SP2_BUF;
    REG_MCU_VREM = MCU_REMAINDER_INIT | 0x00;
    REG_MCU_A0REM = MCU_REMAINDER_INIT | 0x00;
    REG_MCU_SP1REM = MCU_REMAINDER_INIT | 0x00;
    REG_MCU_SP2REM = MCU_REMAINDER_INIT | 0x00;

    REG_PLAT_PROC1_2ND_INT_MASK_DISABLE = (INT_PROC1_2ND_VBUF_UNDERFLOW | INT_PROC1_2ND_VBUF_OVERFLOW);

    // Chuan0.85, Give the overflow threshold.
    REG_MCU_VOTH = MCU_VOTH_VALUE / 4;
    REG_MCU_VUTH = MCU_VUTH_VALUE / 4;

    // LLY1.21-1, it's un-necessary to enable PROC1_2ND_WR_PROTECTION
    // Since, nobody to write the interrupte service routine.
    //REG_PLAT_PROC1_2ND_INT_MASK_PRIORITY |= INT_PROC1_2ND_MCU_WR_PROTECTION;

// Brian0.67
#ifdef  SUPPORT_SERVO_SOURCE
    REG_PLAT_PROC1_2ND_INT_MASK_DISABLE = INT_PROC1_2ND_SERVO; // Brian0.67
#endif  // #ifdef SUPPORT_SERVO_SOURCE

    // Chuan0.90, Set the SP T/B/C Fifo threshold.
    REG_MCU_VCR04 = 0x0F0F;
    REG_MCU_VCR0C = 0x0F0F;
    REG_MCU_VCR14 = 0x0C04;

    // Micky2.11a, move form HAL_InitVariables
    // kevin0.91, set REG_PLAT_SYSTEM_CONFIGURATION1 in one place
    // Since, F/W must disable interrupt and do key lock before accessing
    OS_DISABLE_INTERRUPTS( dwSaveInt );
    MACRO_PLAT_KEY_LOCK( );