📄 ctkav_mcu.h
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#define MCU_INTCTL2_AUDIO_BUF1_UNDERFLOW_ENABLE (0x00000002)#define MCU_INTCTL2_PCM_BUF0_UNDERFLOW_ENABLE (0x00000004)#define MCU_INTCTL2_UNPACK0_FIFO_EMPTY_ENABLE (0x00000008)#define MCU_INTCTL2_UNPACK1_FIFO_EMPTY_ENABLE (0x00000010)#define MCU_INTCTL2_AIURD_FIFO_EMPTY_ENABLE (0x00000020)#define MCU_INTCTL2_AUDIO_BUF0_UNDERFLOW_STATUS (0x00000040)#define MCU_INTCTL2_AUDIO_BUF1_UNDERFLOW_STATUS (0x00000080)#define MCU_INTCTL2_PCM_BUF0_UNDERFLOW_STATUS (0x00000100)#define MCU_INTCTL2_UNPACK0_FIFO_EMPTY_STATUS (0x00000200)#define MCU_INTCTL2_UNPACK1_FIFO_EMPTY_STATUS (0x00000400)#define MCU_INTCTL2_AIURD_FIFO_EMPTY_STATUS (0x00000800)#define MCU_INTCTL2_PCM_BUF_UNDERFLOW_STATUS (0x00001000)#define MCU_INTCTL2_SPDIF_BUF_UNDERFLOW_STATUS (0x00002000)#define MCU_INTCTL2_AIU_PCM_RD_FIFO_EMPTY_STATUS (0x00004000)#define MCU_INTCTL2_AIU_SPDIF_RD_FIFO_EMPTY_STATUS (0x00008000)#define MCU_INTCTL2_AIU_MIC_RD_FIFO_EMPTY_STATUS (0x01000000)#define MCU_INTCTL2_INT_FLAG_STATUS_UPDATE (0x00100000)// define remainder for each buffer#define MCU_MAX_FIFO_LEN (0x20) // maximum FIFO length, 32x32, for each buffer except VLD#define MCU_VLD_MAX_FIFO_LEN (0x10) // maximum FIFO length, 16x32, for VLD#define MCU_BSRD_FIFO_REMAINDER ((REG_MCU_BCR0C >> 16) & 0x0000003f)#define MCU_VLD_FIFO_REMAINDER ((REG_MCU_DCR04 >> 16) & 0x0000001f) // [4:0]#define MCU_BSWR_FIFO_REMAINDER ((REG_MCU_BCR04 >> 16) & 0x0000003f)#define MCU_AIU_UNPACK0_FIFO_REMAINDER ((REG_MCU_ACR0C >> 16) & 0x0000003f)#define MCU_AIU_UNPACK1_FIFO_REMAINDER ((REG_MCU_ACR14 >> 16) & 0x0000003f)#define MCU_BUF_EMPTY (0x00000000)#define MCU_A0_BS_BUF_REMAINDER ((REG_MCU_A0REM & 0x00ffffff) << 2)#define MCU_A1_BS_BUF_REMAINDER ((REG_MCU_A1REM & 0x00ffffff) << 2)#define MCU_VIDEO_BS_BUF_REMAINDER ((REG_MCU_VREM & 0x00ffffff) << 2)#define MCU_SP1_BS_BUF_REMAINDER ((REG_MCU_SP1REM & 0x00ffffff) << 2)#define MCU_SP2_BS_BUF_REMAINDER ((REG_MCU_SP2REM & 0x00ffffff) << 2)#define MCU_PCM_BUF_REMAINDER ((REG_MCU_PCMREM & 0x00ffffff) << 2)#define MCU_PCM0_BUF_REMAINDER ((REG_MCU_PCM0REM & 0x00ffffff) << 2)#define MCU_SPDIF_BUF_REMAINDER ((REG_MCU_SPDIFREM & 0x00ffffff) << 2)#define MACRO_MCU_SUB_SP1_REMAINDER(dwBytes) \ { \ REG_MCU_SP1SUB = (MCU_SP_REMAINDER_SUB | (dwBytes + 3) >> 2); \ }#define MACRO_MCU_SUB_SP2_REMAINDER(dwBytes) \ { \ REG_MCU_SP2SUB = (MCU_SP_REMAINDER_SUB | (dwBytes + 3) >> 2); \ }#define MCU_INIT_BUFFER_REMAINDER (0x01000000)#define MCU_BUFFER_REMAINDER_MASK (0x00ffffff)//#define MCU_REMAINDER_VIDEO_BUF_ADD (0x00000200)//#define MCU_REMAINDER_VIDEO_BUF_SUB (0x00000100)#define MCU_CHANNEL_DUMMY_LEN (8) // this is a dummy length since A?V buffer remainder start from 0xFFFFFFFF (-1)// define clear buffer#define MCU_CLEAR_BUFFER_DONE (~(REG_MCU_CCR01>>31)) // MSB bit indicates clear buffer still doing// define structuretypedef struct _tagMCU_TRANSFER{ DWORD dwMemBase; DWORD dwMemUpper; DWORD dwMemLower;} MCU_TRANSFER, *PMCU_TRANSFER;// define MACROs#define MACRO_MCU_RESET_BIU_READ_FIFO {REG_MCU_MCR5 = MCU_RESET_BIU_READ_FIFO;}#define MACRO_MCU_RESET_BIU_WRITE_FIFO {REG_MCU_MCR5 = MCU_RESET_BIU_WRITE_FIFO;}#define MACRO_MCU_RESET_ALL_FIFO {REG_MCU_MCR5 = 0xFFFFFFFF;}#define MACRO_MCU_RESET_AUDIO_FIFO {REG_MCU_MCR5 = (0x0000007F);}#define MACRO_MCU_RESET_VIDEO_FIFO {REG_MCU_MCR5 = MCU_RESET_VDEC_READ_FIFO;}#define MACRO_MCU_BSINPUT_START (REG_MCU_SW_TRIGGER = 0x01)#define MACRO_MCU_SET_BIU_WRITE_BUFFER(dwMemBase, dwMemUpper, dwMemLower) \ { \ REG_MCU_BCR00 = dwMemBase; \ REG_MCU_BCR02 = dwMemUpper - DATA_WIDTH; \ REG_MCU_BCR03 = dwMemLower; \ }//==================================================// iMemAddr is the address starts to read of linear buffer, it should be 64-bit alignment// iSize is the number of data in unit of 64-bit//---------------------------------------------// start to transfer is activated here, so it is necessary to make sure BIU is ready//==================================================#define MACRO_MCU_SET_BIU_READ_LINEAR_BUFFER(dwMemAddr, dw32BitSize) \ { \ REG_MCU_BCR08 = dwMemAddr; \ REG_MCU_BCR0D = (MCU_BSTYPE_ATAPI|0x00010000|dw32BitSize); \ }#define MACRO_MCU_SET_BIU_READ_DVD_BLOCK_BUFFER(dwMemAddr) \ { \ REG_MCU_BCR08 = dwMemAddr; \ REG_MCU_BCR0A = 0x00400004; \ REG_MCU_BCR0D = (MCU_BSTYPE_DVD|0x00c0002b); \ }#define MACRO_MCU_SET_BIU_READ_CD_BLOCK_BUFFER(dwMemAddr, dwNumSectors, dwNumValid32Bit) \ { \ REG_MCU_BCR08 = dwMemAddr; \ REG_MCU_BCR0A = 0x0a000004; \ REG_MCU_BCR0D = (MCU_BSTYPE_CD|(dwNumSectors << 16)|dwNumValid32Bit); \ }#define MACRO_MCU_BIU_BSTYPE( dwBSType ) \{ \ REG_MCU_VEDIO_REMCTL &= MCU_BIT_STREAM_TYPE_UNMASK; \ REG_MCU_VEDIO_REMCTL |= dwBSType; \}#define MACRO_MCU_BIU_WRITE_FIFO_REMAINDER (REG_MCU_BCR04 >> 16)#define MACRO_MCU_WRITE_PROTECTION(dwOrder, dwMemBase, dwMemUpper) \ { \ *(PREG_MCU_WP0BASE + (dwOrder << 1)) = dwMemBase; \ *(PREG_MCU_WP0SIZE + (dwOrder << 1)) = dwMemUpper - DATA_WIDTH; \ }#define MACRO_MCU_WRITE_PROTECTION_ENABLE(dwFlag) \{ \ REG_MCU_WPROTEN = dwFlag; \}//Alan1.01#define MACRO_MCU_ENABLE_PROTECTION(dwFlag) \{ \ REG_MCU_WPROTEN |= dwFlag; \}//Alan1.01#define MACRO_MCU_DISABLE_PROTECTION(dwFlag) \{ \ REG_MCU_WPROTEN &= ~dwFlag; \}#define MACRO_MCU_CLEAR_BUFFER(dwMemBase, dwFillBytes, dwFillPattern) \{ \ REG_MCU_CCR00 = dwMemBase; \ REG_MCU_CCR01 = (((dwFillBytes) << 8) | dwFillPattern) | 0x80000000; \}#define MACRO_MCU_SET_VLD_READ_BUFFER(dwMemBase, dwMemUpper, dwMemLower) \{ \ REG_MCU_DCR00 = dwMemBase; \ REG_MCU_DCR02 = dwMemUpper - DATA_WIDTH; \ REG_MCU_DCR03 = dwMemLower; \}#define MACRO_MCU_SET_AIU_UNPACKER0_READ_BUFFER(dwMemBase, dwMemUpper, dwMemLower) \{ \ REG_MCU_ACR08 = dwMemBase; \ REG_MCU_ACR0A = dwMemUpper - DATA_WIDTH; \ REG_MCU_ACR0B = dwMemLower; \}#define MACRO_MCU_SET_AIU_UNPACKER1_READ_BUFFER(dwMemBase, dwMemUpper, dwMemLower) \{ \ REG_MCU_ACR10 = dwMemBase; \ REG_MCU_ACR12 = dwMemUpper - DATA_WIDTH; \ REG_MCU_ACR13 = dwMemLower; \}#define MCU_VUTH_VALUE (5 * 8)#define MCU_VOTH_VALUE (0x1000 * 8)#ifdef __cplusplus}#endif //__cplusplus#endif // __CTKAV_MCU_H__⌨️ 快捷键说明
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