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📄 hio.c

📁 ct952 source code use for Digital Frame Photo
💻 C
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    {
        // Return last GPO value
        if( REG_PLAT_GPE_SET & dwDesiredPort )
        {
            return 1;
        }
        else
        {
            return 0;
        }
    }
    else if(bGroup==GPIO_F)
    {
        // Return last GPO value
        if( REG_PLAT_GPF_SET & dwDesiredPort )
        {
            return 1;
        }
        else
        {
            return 0;
        }
    }
    else if(bGroup==GPIO_G)
    {
        // Return last GPO value
        if( REG_PLAT_GPG_SET & dwDesiredPort )
        {
            return 1;
        }
        else
        {
            return 0;
        }
    }
    else if(bGroup==GPIO_H)
    {
        // Return last GPO value
        if( REG_PLAT_GPH_SET & dwDesiredPort )
        {
            return 1;
        }
        else
        {
            return 0;
        }
    }
#endif  // #ifdef CT909P_IC_SYSTEM
    // GPCDE @ same register of CT909R
#ifdef  CT909R_IC_SYSTEM
    else if( (bGroup>=GPIO_C) && (bGroup<=GPIO_E) )
    {
        // Return last GPO value
        if( REG_PLAT_GPCDE_SET & dwDesiredPort )
        {
            return 1;
        }
        else
        {
            return 0;
        }
    }
#endif  // #ifdef CT909R_IC_SYSTEM
    // LLY2.56, add CT909G GPC control
#ifdef  CT909G_IC_SYSTEM
    else if(bGroup==GPIO_C)
    {
        // Return last GPO value
        if( REG_PLAT_GPC_SET & dwDesiredPort )
        {
            return 1;
        }
        else
        {
            return 0;
        }
    }
#endif  // #ifdef CT909G_IC_SYSTEM

#ifdef  ENABLE_EXPAND_GPIO
    else if(bGroup==GPIO_EXP)
    {
        // Return GPO current value
        // If "ACTIVE_LOW", means the value is 0, but output is 1, so must return 1
#ifdef  ACTIVE_LOW
        if( REG_PLAT_PANEL_DISP0 & dwDesiredPort )
        {
            return 0;
        }
        else
        {
            return 1;
        }
#else   // #ifdef ACTIVE_LOW
        if( REG_PLAT_PANEL_DISP0 & dwDesiredPort )
        {
            return 1;
        }
        else
        {
            return 0;
        }
#endif  // #ifdef ACTIVE_LOW
    }
#endif  // #ifdef  ENABLE_EXPAND_GPIO
    else
    {
        DBG_Printf(DBG_THREAD_CHEERDVD, DBG_INFO_PRINTF, "Err: not implemented GPIO group (W) : %lx\n", bGroup);
    }

    return 0;


}


// LLY2.13, add expand GPIO related APIs
//  *******************************************************************************************
//  Function    :   HAL_Init_ExpIO
//  Description :   Configure the related register while using expand GPIO
//  Argument    :   None
//  Return      :   None
//  *******************************************************************************************
void    HAL_Init_ExpGPIO(void)
{
#ifdef  ENABLE_EXPAND_GPIO

    DWORD   dwSaveInt;

    // LLY2.51, config different register for expand GPIO
#ifdef  CT909P_IC_SYSTEM
    // CT909P expand GPIO control are moved to GPCMux
#ifndef NO_LATCH_D1
    // Using GPC[4], must enable GPCMux[3]=1
    REG_PLAT_GPC_MUX |= (1L<<3);
#endif  // #ifndef NO_LATCH_D1

#ifndef NO_LATCH_D0
    // Using GPC[3], must enable GPCMux[2]=1
    REG_PLAT_GPC_MUX |= (1L<<2);
#endif  // #ifndef NO_LATCH_D0

#ifndef NO_KEY_DETECT_1
    // Using GPC[5], must enable GPCMux[6]=1
    REG_PLAT_GPC_MUX |= (1L<<6);
#endif  // #ifndef NO_KEY_DETECT_1

#ifndef NO_KEY_DETECT_0
    // Using GPC[0], must enable GPCMux[0]=1
    REG_PLAT_GPC_MUX |= (1L);
#endif  // #ifndef NO_KEY_DETECT_0

    // Using GPC[1] as KS_DATA pin, GPC[2] as KS_CLK pin
    // So, must enable GPCMux[1]=1
    REG_PLAT_GPC_MUX |= (1L<<1);

#endif  // #ifdef CT909P_IC_SYSTEM

#ifdef  CT909R_IC_SYSTEM
    // LLY2.15, modify the procedure to enable each feature base on user selection.
    // Set bit[24] as 1 to support latch D1, using GPB[14]
#ifndef NO_LATCH_D1
    REG_PLAT_MPLL_CONTROL |= (1<<24);
#endif  // #ifndef NO_LATCH_D1

    // Set bit[23] as 1 to support latch D0, using GPB[1]
#ifndef NO_LATCH_D0
    REG_PLAT_MPLL_CONTROL |= (1<<23);
#endif  // #ifndef NO_LATCH_D0

    // Set bit[22] as 1 to support key detect 1, using GPB[11]
#ifndef NO_KEY_DETECT_1
    REG_PLAT_MPLL_CONTROL |= (1<<22);
#endif  // #ifndef NO_KEY_DETECT_1

    // Set bit[21] as 1 to support key detect 0, using GPB[10]
#ifndef NO_KEY_DETECT_0
    REG_PLAT_MPLL_CONTROL |= (1<<21);
#endif  // #ifndef NO_KEY_DETECT_0
#endif  // #ifdef CT909R_IC_SYSTEM

    // LLY2.16, need disable interrupt and do key lock before access system configure register 1
    OS_DISABLE_INTERRUPTS( dwSaveInt );
    MACRO_PLAT_KEY_LOCK( );

    // Set bit 15 as 1 to enable panel key scan (expand GPIO function)
    REG_PLAT_SYSTEM_CONFIGURATION1 |= (1<<15);   // set 15th bit as 1 to enable panel scan

    MACRO_PLAT_KEY_UNLOCK();
    OS_RESTORE_INTERRUPTS (dwSaveInt);

    // Set serial clock divider for expand GPIO
    REG_PLAT_PANEL_CLK = 0x00FF0000;

    // Config expand GPIO environment
    // bit[10:8]=0x1, set common port number =1 (2 port); 0 (1 port)
    // bit[1]=1, set active polarity of display is high-level trigger
    // bit[2]=0, set active polarity of keypad detection is low (since current circuit is pull high)
    // Notice: bit[2] & bit[0] value must be same
#ifdef  ACTIVE_LOW
    REG_PLAT_PANEL_CFG = 0x00000102;
#else   // #ifdef ACTIVE_LOW
    REG_PLAT_PANEL_CFG = 0x00000107;
#endif  // #ifdef ACTIVE_LOW
//    REG_PLAT_PROC1_2ND_INT_MASK_DISABLE = INT_PROC1_2ND_PANEL_IR;   // This is for Panel intrrupt//    REG_PLAT_PANEL_INTCTRL = 0xFFFF0000;  // Edge trigger//    REG_PLAT_PANEL_INTCTRL = 0x00000000;    // Level trigger
    // Set bit[15:0] as 1 to mask interrupt
    //     bit[31:16] as 0 to using level trigger
    // Notice: interrupt only can use edge trigger
    REG_PLAT_PANEL_INTCTRL = 0x0000FFFF;


//    REG_PLAT_PANEL_INT = 0x0;
//    REG_PLAT_PANEL_DISP0 = 0;

#else   // #ifdef ENABLE_EXPAND_GPIO
    // LLY2.60, do error protection while not support H/W expand GPIO

#ifdef  CT909P_IC_SYSTEM
    // [1] Disable GPC[0, 1, 2, 3, 4, 5] pin for H/W expand GPIO usage @ CT909P IC
    //     So, clear GPCMux[0, 1, 2, 3, 6]=0
    REG_PLAT_GPC_MUX &= ~(0x4fL);
#endif  //

#endif  // #ifdef  ENABLE_EXPAND_GPIO
}


#ifdef  SUPPORT_I2CVOID _Delay_I2C(void)
{    BYTE i;    for(i = 0; i < 20; i++);}BOOL 	HAL_I2C_Write (BYTE DevSel, PI2C_CONFIG  pConfig, PTRANSFER_CONFIG pTransferConfig )
//BOOL _I2C_Write (PI2C_CONFIG  pConfig, BYTE DevSel, BYTE *pBuffer, BYTE count )
{    BYTE    i;    BOOL    bWriteResult = FALSE;
#ifdef  ENABLE_PANEL_KEYSCAN
    __icVFDnow = 0x01; //Disable Panel Keyscan#endif  // #ifdef  ENABLE_PANEL_KEYSCAN
    HAL_I2CSrc_Ctrl(MUTEX_ACTION_LOCK);

    _IIC_START(pConfig);    _IIC_TxByte (pConfig, DevSel );     // Write Slave Address    if (_IIC_GetACK(pConfig))    {
        goto WRITE_FUNC_END;
//        return FALSE;
    }

    // issue write address first
        _IIC_TxByte(pConfig, (*pTransferConfig).bAddr);
        if (_IIC_GetACK(pConfig))    {
        goto WRITE_FUNC_END;
//        return FALSE;
    }

    for ( i = 0; i < (*pTransferConfig).bCount; i++ )
    {        _IIC_TxByte(pConfig, *((*pTransferConfig).pbBuffer)++);
        if (_IIC_GetACK(pConfig))        {
            goto WRITE_FUNC_END;
//            return FALSE;
        }
    }
    _IIC_STOP(pConfig);    bWriteResult = TRUE;

WRITE_FUNC_END:

    HAL_I2CSrc_Ctrl(MUTEX_ACTION_UNLOCK);

#ifdef  ENABLE_PANEL_KEYSCAN
    __icVFDnow = 0x00; //Enable Panel Keyscan
#endif  // #ifdef  ENABLE_PANEL_KEYSCAN

    if (I2C_ID_EEPROM == DevSel)        OS_DelayTime(COUNT_50_MSEC);  // The write cycle time needs to > 10 ms//    return TRUE;

    return bWriteResult;
}BOOL 	HAL_I2C_Read (BYTE DevSel, PI2C_CONFIG  pConfig, PTRANSFER_CONFIG pTransferConfig)
{
    BYTE i;    BOOL bReadResult = FALSE;
#ifdef  ENABLE_PANEL_KEYSCAN    __icVFDnow = 0x01; //Disable Panel Keyscan#endif  // #ifdef  ENABLE_PANEL_KEYSCAN
    HAL_I2CSrc_Ctrl(MUTEX_ACTION_LOCK);

    _IIC_START(pConfig);    _IIC_TxByte(pConfig, DevSel);    if(_IIC_GetACK(pConfig))
    {
        goto READ_FUNC_END;
//        return FALSE;
    }
    _IIC_TxByte(pConfig, (*pTransferConfig).bAddr);
    if(_IIC_GetACK(pConfig))
    {
        goto READ_FUNC_END;
//        return FALSE;
    }

    // random read
    _IIC_START(pConfig);
    _IIC_TxByte(pConfig, (BYTE)(DevSel|0x01));    if(_IIC_GetACK(pConfig))
    {
        goto READ_FUNC_END;
//        return FALSE;
    }
    *((*pTransferConfig).pbBuffer) ++ = _IIC_RxByte(pConfig);
    _IIC_STOP(pConfig);    _Delay_I2C();
    for ( i = 0; i < (*pTransferConfig).bCount - 1; i++ )
    {        _IIC_START(pConfig);        _IIC_TxByte(pConfig, (BYTE)(DevSel|0x01));        if(_IIC_GetACK(pConfig))
        {
            goto READ_FUNC_END;
//            return FALSE;
        }
        *((*pTransferConfig).pbBuffer) ++ = _IIC_RxByte(pConfig);
        _IIC_STOP(pConfig);        _Delay_I2C();    }      bReadResult = TRUE;

READ_FUNC_END:

    HAL_I2CSrc_Ctrl(MUTEX_ACTION_UNLOCK);

#ifdef  ENABLE_PANEL_KEYSCAN    __icVFDnow = 0x00; //Enable Panel Keyscan
#endif  // #ifdef  ENABLE_PANEL_KEYSCAN//    return TRUE;

    return bReadResult;
}VOID _IIC_START (PI2C_CONFIG  pConfig){
    _I2C_Set_SDAT_HIGH(pConfig);    _I2C_Set_SCLK_HIGH(pConfig);    _I2C_Set_SDAT_LOW(pConfig);    _I2C_Set_SCLK_LOW(pConfig);}VOID _IIC_TxByte (PI2C_CONFIG  pConfig, BYTE bValue){
    BYTE    i;    for(i = 0; i < 8; i++)    {        if( bValue & 0x80)        {            _I2C_Set_SDAT_HIGH(pConfig);        }        else        {            _I2C_Set_SDAT_LOW(pConfig);        }        _I2C_Set_SCLK_HIGH(pConfig);        _I2C_Set_SCLK_LOW(pConfig);        bValue = bValue << 1 ;    }}BYTE _IIC_RxByte (PI2C_CONFIG  pConfig){    BYTE i, bRet;
    bRet = 0x00;    for ( i= 0x80; i; i >>= 1)    {        _I2C_Set_SCLK_HIGH(pConfig);
        if ( _I2C_Get_SDAT(pConfig) )            bRet |= i;
        _I2C_Set_SCLK_LOW(pConfig);    }
    return bRet;}BYTE _IIC_GetACK (PI2C_CONFIG  pConfig){    BYTE    bRet;    _Delay_I2C();    HAL_ReadGPIO(pConfig->bIOGroup, pConfig->bSDAT_Pin);  //set input mode only
    _Delay_I2C();
    _I2C_Set_SCLK_HIGH(pConfig);    bRet = _I2C_Get_SDAT(pConfig);    _I2C_Set_SCLK_LOW(pConfig);    return bRet;}

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