hio.c

ct952 source code use for Digital Frame Photo

        else if(dwPort==20)
        {
            // GPAMux[20]=1; GPAMux[19]=0
            REG_PLAT_GPA_MUX &= ~(0x1L<<19);
            REG_PLAT_GPA_MUX |= (0x1L<<20);
        }
        else if(dwPort==21)
        {
            // GPAMux[22]=1; GPAMux[21]=0
            REG_PLAT_GPA_MUX &= ~(0x1L<<21);
            REG_PLAT_GPA_MUX |= (0x1L<<22);
        }
        else if(dwPort==22 || dwPort==23)
        {
            // GPAMux[23]=1
            REG_PLAT_GPA_MUX |= (0x1L<<23);
        }
        else if(dwPort>=26 && dwPort<=31)
        {
            // GPAMux[25]=1, GPAMux[26]=0
            REG_PLAT_GPA_MUX &= ~(0x1L<<26);
            REG_PLAT_GPA_MUX |= (0x1L<<25);
        }

#endif  // #ifdef CT909P_IC_SYSTEM

        // Set 0 to enable the desired port as output mode
        REG_PLAT_GPA_IO_DIR_CONTROL &= ~(dwDesiredPort);

        // Set the value to corresponding port.
        if(bValue)
        {
            // Set 1 to desired port to write the value as 1
            // Notice: only CT909R need read-back the value first then do operation
            //         and it's ok to access the corresponding bit directly by new chip
#ifdef  CT909R_IC_SYSTEM
            REG_PLAT_GPA_SET |= dwDesiredPort;
#else   // #ifdef CT909R_IC_SYSTEM
            REG_PLAT_GPA_SET = dwDesiredPort;
#endif  // #ifdef CT909R_IC_SYSTEM
        }
        else
        {
            // Set 1 to desired port to clear the value as 1
            REG_PLAT_GPA_CLEAR = dwDesiredPort;
        }
    }
    else if(bGroup==GPIO_B)
    {
        // LLY2.56, GPB control can be handled by MPEG part @ CT909G
        // Notice: default disable MPEG path otherwise can't access servo internal H/W block
#if 0// def  CT909G_IC_SYSTEM
        // Notice: bit[16]:GPB_EN, must set as 1, then can control GPB by MPEG part
        REG_PLAT_GPB_IO_DIR_CONTROL |= (0x1L<<16);

        // Set 0 to enable the desired port as output mode
        REG_PLAT_GPB_IO_DIR_CONTROL &= ~(dwDesiredPort);


        // Set the value to corresponding port.
        if(bValue)
        {
            // Set 1 to desired port to write the value as 1
            REG_PLAT_GPB_SET = dwDesiredPort;
        }
        else
        {
            // Set 1 to desired port to clear the value as 1
            REG_PLAT_GPB_CLEAR = dwDesiredPort;
        }
#else   // #ifdef CT909G_IC_SYTEM

        // Set GPB output function selection register as GPIO mode by 0
        // LLY2.15, only can modify the desired port
        REG_SERVO_GPB_FUNC_SEL &= ~(dwDesiredPort);

        // Set 0 to enable the desired port as output mode
        REG_SERVO_GPB_IO_DIR_CONTROL &= ~(dwDesiredPort);

        // Set the value to corresponding port
        // LLY2.56, split GPB output data control to two different register,
        // ie. one is for set, another is for clear
        // And, only need to set the desired port, ie. un-necessary to read-back the value first
#ifdef  CT909G_IC_SYSTEM
        if(bValue)
        {
            // Set 1 to desired port to write the value as 1
            REG_SERVO_GPB_SETDATA = dwDesiredPort;
        }
        else
        {
            // Set 1 to desired port to clear the value as 1
            REG_SERVO_GPB_CLEARDATA = dwDesiredPort;
        }
#else   // #ifdef CT909G_IC_SYSTEM
        if(bValue)
        {
            REG_SERVO_GPB_OUTDATA |= (dwDesiredPort);
        }
        else
        {
            REG_SERVO_GPB_OUTDATA &= ~(dwDesiredPort);
        }
#endif  // #ifdef CT909G_IC_SYSTEM
#endif  // #ifdef CT909G_IC_SYSTEM
    }
#ifdef  CT909P_IC_SYSTEM
    else if(bGroup==GPIO_C)
    {
        // Set 0 to enable the desired port as output mode
        REG_PLAT_GPC_IO_DIR_CONTROL &= ~(dwDesiredPort);

        // Set the value to corresponding port.
        if(bValue)
        {
            // Set 1 to desired port to write the value as 1
            REG_PLAT_GPC_SET = dwDesiredPort;
        }
        else
        {
            // Set 1 to desired port to clear the value as 1
            REG_PLAT_GPC_CLEAR = dwDesiredPort;
        }
    }
    else if(bGroup==GPIO_D)
    {
        // Set 0 to enable the desired port as output mode
        REG_PLAT_GPD_IO_DIR_CONTROL &= ~(dwDesiredPort);

        // Set the value to corresponding port.
        if(bValue)
        {
            // Set 1 to desired port to write the value as 1
            REG_PLAT_GPD_SET = dwDesiredPort;
        }
        else
        {
            // Set 1 to desired port to clear the value as 1
            REG_PLAT_GPD_CLEAR = dwDesiredPort;
        }
    }
    else if(bGroup==GPIO_E)
    {
        // Set 0 to enable the desired port as output mode
        REG_PLAT_GPE_IO_DIR_CONTROL &= ~(dwDesiredPort);

        // Set the value to corresponding port.
        if(bValue)
        {
            // Set 1 to desired port to write the value as 1
            REG_PLAT_GPE_SET = dwDesiredPort;
        }
        else
        {
            // Set 1 to desired port to clear the value as 1
            REG_PLAT_GPE_CLEAR = dwDesiredPort;
        }
    }
    else if(bGroup==GPIO_F)
    {
        // Set 0 to enable the desired port as output mode
        REG_PLAT_GPF_IO_DIR_CONTROL &= ~(dwDesiredPort);

        // Set the value to corresponding port.
        if(bValue)
        {
            // Set 1 to desired port to write the value as 1
            REG_PLAT_GPF_SET = dwDesiredPort;
        }
        else
        {
            // Set 1 to desired port to clear the value as 1
            REG_PLAT_GPF_CLEAR = dwDesiredPort;
        }
    }
    else if(bGroup==GPIO_G)
    {
        // Set 0 to enable the desired port as output mode
        REG_PLAT_GPG_IO_DIR_CONTROL &= ~(dwDesiredPort);

        // Set the value to corresponding port.
        if(bValue)
        {
            // Set 1 to desired port to write the value as 1
            REG_PLAT_GPG_SET = dwDesiredPort;
        }
        else
        {
            // Set 1 to desired port to clear the value as 1
            REG_PLAT_GPG_CLEAR = dwDesiredPort;
        }
    }
    else if(bGroup==GPIO_H)
    {
        // Set 0 to enable the desired port as output mode
        REG_PLAT_GPH_IO_DIR_CONTROL &= ~(dwDesiredPort);

        // Set the value to corresponding port.
        if(bValue)
        {
            // Set 1 to desired port to write the value as 1
            REG_PLAT_GPH_SET = dwDesiredPort;
        }
        else
        {
            // Set 1 to desired port to clear the value as 1
            REG_PLAT_GPH_CLEAR = dwDesiredPort;
        }
    }
#endif  // #ifdef CT909P_IC_SYSTEM
    // GPCDE @ same register of CT909R
#ifdef  CT909R_IC_SYSTEM
    else if( (bGroup>=GPIO_C) && (bGroup<=GPIO_E) )
    {
        // Set 0 to enable the desired port as output mode
        REG_PLAT_GPCDE_IO_DIR_CONTROL &= ~(dwDesiredPort);

        // Set the value to corresponding port.
        if(bValue)
        {
            // Set 1 to desired port to write the value as 1
            REG_PLAT_GPCDE_SET |= dwDesiredPort;
        }
        else
        {
            // Set 1 to desired port to clear the value as 1
            REG_PLAT_GPCDE_CLEAR = dwDesiredPort;
        }
    }

#endif  // #ifdef CT909R_IC_SYSTEM
    // LLY2.56, add for CT909G GPC control procedure.
#ifdef  CT909G_IC_SYSTEM
    else if(bGroup==GPIO_C)
    {
        // Set 0 to enable the desired port as output mode
        REG_PLAT_GPC_IO_DIR_CONTROL &= ~(dwDesiredPort);

        // Set the value to corresponding port.
        if(bValue)
        {
            // Set 1 to desired port to write the value as 1
            REG_PLAT_GPC_SET = dwDesiredPort;
        }
        else
        {
            // Set 1 to desired port to clear the value as 1
            REG_PLAT_GPC_CLEAR = dwDesiredPort;
        }
    }

#endif  // #ifdef CT909G_IC_SYSTEM

#ifdef  ENABLE_EXPAND_GPIO
    else if(bGroup==GPIO_EXP)
    {
        // LLY2.15, if enable "ACTIVE_LOW", ie, means F/W must write 0, then output will be 1
        // So, if user want to see 1, F/W must write 0
#ifdef  ACTIVE_LOW
        if(bValue)
        {
            REG_PLAT_PANEL_DISP0 &= ~(dwDesiredPort);
        }
        else
        {
            REG_PLAT_PANEL_DISP0 |= (dwDesiredPort);
        }
#else   // #ifdef ACTIVE_LOW
        if(bValue)
        {
            REG_PLAT_PANEL_DISP0 |= (dwDesiredPort);
        }
        else
        {
            REG_PLAT_PANEL_DISP0 &= ~(dwDesiredPort);
        }
#endif  // #ifdef ACTIVE_LOW
    }
#endif  // #ifdef  ENABLE_EXPAND_GPIO
    else
    {
        DBG_Printf(DBG_THREAD_CHEERDVD, DBG_INFO_PRINTF, "Err: not implemented GPIO group (W) : %lx\n", bGroup);
    }


    OS_RESTORE_INTERRUPTS(dwSaveInt);

}


// LLY2.51 create.
//  *******************************************************************************************
//  Function    :   HAL_ReadGPO_Value
//  Description :   Read back the desired GPO port current value
//  Arguments   :   bGroup: specify the GPIO group
//                  dwPort: port #
//  Return      :   The desired GPO port current value.
//  *******************************************************************************************
BYTE    HAL_ReadGPO_Value(BYTE bGroup, DWORD dwPort)
{
    // Used to keep desired port position, one port -> one position
    DWORD   dwDesiredPort;

#ifdef CT909R_IC_SYSTEM
    if(bGroup == GPIO_F)
    {
        DBG_Printf(DBG_THREAD_CHEERDVD, DBG_INFO_PRINTF, "Err: Not implement GPIO group\n");
        return FALSE;
    }
#endif  // #ifdef CT909R_IC_SYSTEM

    if(bGroup==GPIO_EXP)
    {
        // LLY2.16, go S/W Expand GPIO path
#ifdef  SW_EXPAND_GPIO
        if(__dwExpGPOVal & (1<<dwPort))
        {
            return 1;
        }
        else
        {
            return 0;
        }
#else   // #ifdef SW_EXPAND_GPIO
        // LLY2.15, must swap for desired port bit[7:0], bit[15:8]
        // ie. port 0 --> port7; port 8 --> port15
        // Since, IC design will output bit[0] first for Expand GPIO GPO mode
        dwPort = (dwPort&0x8) | ((~dwPort)&0x7);
        //DBG_Printf(DBG_THREAD_CHEERDVD, DBG_INFO_PRINTF, "Port: %lx\n", dwPort);
#endif  // #ifdef SW_EXPAND_GPIO
    }

    // LLY2.50, do index map for GPB since it's different @ CT909P
#ifdef  CT909P_IC_SYSTEM
    if(bGroup==GPIO_B)
    {
        BYTE    aMap[6]={8, 6, 15, 16, 17, 18};

        if(dwPort >= 6)
        {
            DBG_Printf(DBG_THREAD_CHEERDVD, DBG_INFO_PRINTF, "Err: Not supported GPB port\n");
            return 0;
        }
        dwPort = aMap[dwPort];
    }
#endif  // #ifdef CT909P_IC_SYSTEM

    // Shift the desired port to final position first
    dwDesiredPort = (1<<dwPort);

#ifdef CT909R_IC_SYSTEM
    // Shift left again for GPIO CDE, since they shared the same register @ CT909R
    if(bGroup==GPIO_D)
    {
        // Shift left 8 bit since GPIO D @ bit[15:8] first
        dwDesiredPort = (dwDesiredPort << 8);
    }
    else if(bGroup==GPIO_E)
    {
        // Shift left 16 bit since GPIO E @ bit [24:16] first
        dwDesiredPort = (dwDesiredPort << 16);
    }
#endif  // #ifdef CT909R_IC_SYSTEM

    if(bGroup==GPIO_A)
    {
        // Return last GPO value
        if( REG_PLAT_GPA_SET & dwDesiredPort )
        {
            return 1;
        }
        else
        {
            return 0;
        }
    }
    else if(bGroup==GPIO_B)
    {
        // Return last GPO value
        // LLY2.56, GPB control can be handled by MPEG part @ CT909G
        // Notice: default disable MPEG path otherwise can't access servo internal H/W block
#if 0// def  CT909G_IC_SYSTEM
        if( REG_PLAT_GPB_SET & dwDesiredPort )
#else   // #ifdef CT909G_IC_SYSTEM
        // LLY2.56, split GPB output data control to two different register,
        // ie. one is for set, another is for clear
#ifdef  CT909G_IC_SYSTEM
        if(REG_SERVO_GPB_SETDATA & dwDesiredPort)
#else   // #ifdef  CT909G_IC_SYSTEM
        if(REG_SERVO_GPB_OUTDATA & dwDesiredPort)
#endif  // #ifdef CT909G_IC_SYSTEM
#endif  // #ifdef CT909G_IC_SYSTEM
        {
            return 1;
        }
        else
        {
            return 0;
        }
    }
#ifdef  CT909P_IC_SYSTEM
    else if(bGroup==GPIO_C)
    {
        // Return last GPO value
        if( REG_PLAT_GPC_SET & dwDesiredPort )
        {
            return 1;
        }
        else
        {
            return 0;
        }
    }
    else if(bGroup==GPIO_D)
    {
        // Return last GPO value
        if( REG_PLAT_GPD_SET & dwDesiredPort )
        {
            return 1;
        }
        else
        {
            return 0;
        }
    }
    else if(bGroup==GPIO_E)