📄 hdecoder.c
字号:
OS_RESTORE_INTERRUPTS( dwSaveInt ); // Restore INT. OS_REORDER_BARRIER(); //wait for Proc2's booting ACK (audio start OK) dwTime=OS_GetSysTimer(); while( (OS_GetSysTimer() - dwTime) < PROC2_RESET_ACK_TIME_OUT) // kevin1.05, COUNT_200_MSEC -> COUNT_250_MSEC { dwAck = (*(volatile DWORD *)(0x800007e4)); dwAck >>= 16; if(dwAck==0) { // LLY2.55, keep current PROC2 code after PROC2 booting ok __bCurProc2Code=bAudioType; break; } } if(dwAck) { DBG_Printf(DBG_THREAD_CHEERDVD, DBG_INFO_PRINTF, "Proc 2 booting2 fail\n"); } // LLY2.21, Porting Chuan's code to restore time1 value first // Since, it will be updated by PROC2 REG_PLAT_TIMER1_RELOAD = dwREG_PLAT_TIMER1_RELOAD; // Notice: (1) only can protect audio code area while the audio code range is valid // (2) only can read-back 27bit for REG_MCU_WP1BASE if ((REG_MCU_WP1BASE >= (DS_PROC2_STARTADDR&0x7FFFFFF)) && (REG_MCU_WP1BASE <= (DS_PROC2_SP&0x7FFFFFF)) && (REG_MCU_WP1SIZE >= (DS_PROC2_STARTADDR&0x7FFFFFF)) && (REG_MCU_WP1SIZE <= (DS_PROC2_SP&0x7FFFFFF)) && (REG_MCU_WP1SIZE > REG_MCU_WP1BASE)) { MACRO_MCU_ENABLE_PROTECTION(MCU_WRITE_PROTECT_AREA1_ENABLE); }// Chuan1.08, Turn off PROM#ifdef SUPPORT_PROM_DISABLE OS_DISABLE_INTERRUPTS( dwSaveInt ); REG_PLAT_CLK_GENERATOR_CONTROL |= PLAT_MCLK_PROM_DISABLE; OS_RESTORE_INTERRUPTS( dwSaveInt );#endif // #ifdef SUPPORT_PROM_DISABLE#endif}//********************************************************************// Description : Initialize Audio Shared Memory// Arguments : None// Return : None//********************************************************************// LLY2.31, base on CT908R-AP Note-005.doc to set different gain value for Dolby & 瓣夹 certification#ifdef DOLBY_AUDIO_STANDARD#define PARA_GAIN 0x3CL#else // #ifdef DOLBY_AUDIO_STANDARD// LLY2.51, porting Chuan's code for different gain value for CT909P IC// LLY2.61, porting Chuan's code to let gain value are same for CT909G/R IC//#ifdef CT909P_IC_SYSTEM#if defined(CT909R_IC_SYSTEM) || defined(CT909G_IC_SYSTEM)#define PARA_GAIN 0x33L#else // #if defined(CT909R_IC_SYSTEM) || defined(CT909G_IC_SYSTEM)#define PARA_GAIN 0x30L#endif // #if defined(CT909R_IC_SYSTEM) || defined(CT909G_IC_SYSTEM)#endif // #ifdef DOLBY_AUDIO_STANDARDvoid HAL_InitAudio(void) //test OK{ DWORD dwTempReg;#ifdef CT909G_IC_SYSTEM // LLY2.61, tell audio decoder current CT909G IC type (5.1ch or 2ch)#ifdef SUPPORT_2_CHANNEL_ONLY HAL_WriteAM(HAL_AM_CT909G_2CH, 1); // 2 ch only#else // #ifdef SUPPORT_2_CHANNEL_ONLY HAL_WriteAM(HAL_AM_CT909G_2CH, 0); // 5.1 ch#endif // #ifdef SUPPORT_2_CHANNEL_ONLY // Joey2.60: Select all channels as active channel for volume control HAL_WriteAM(HAL_AM_PCM_SCALE_ACTIVE_CHANNEL, 0xff);#endif // #ifdef CT909G_IC_SYSTEM HAL_WriteAM(HAL_AM_ENCODE_SPDIF_RAW, 1); //max audio buffer remainer during PAUSE/Video master mode HAL_WriteAM(HAL_AM_SKIP_THRESHOLD, 0x1000); // Disable down-sample/ un-sample control HAL_WriteAM( HAL_AM_DOWNSAMPLE_EN, 0) ; HAL_WriteAM( HAL_AM_UPSAMPLE_EN, 0); // J500KWShih_220, initial buffer address for language syudy by zero HAL_WriteAM(HAL_AM_LSBUF_ADR, 0); // initialize A/V sync control for DSP; otherwise, it maybe let video master and A/V hang HAL_ControlAVSync(HAL_AVSYNC_VIDEOMASTER, FALSE);#ifdef SUPPORT_6CH_OUTPUT_FOR_NONDVD HAL_WriteAM( HAL_AM_2CH_TO_6CH, 1);#else // #ifdef SUPPORT_6CH_OUTPUT_FOR_NONDVD HAL_WriteAM( HAL_AM_2CH_TO_6CH, 0);#endif // #ifdef SUPPORT_6CH_OUTPUT_FOR_NONDVD#ifndef NO_MIC_INPUT //MIC detect threshold HAL_WriteAM(HAL_AM_MIC_DETECT_THRESHOLD, 0x80); //MIC config REG_AIU_MIC_CONFG |= (AUDIO_ALIGN_FORMAT<<2) | (0xf<<4); // 16 bits //kevin1.02, fix IR Power off-> power on => noise when reading disc (MIC_PCM_SCALE != 0) //set default MIC volume in CHIPS_Initial(CHIPS_INIT_VOL); enable/disable MIC in CHIPS_OpenAudio() /* //set default MIC volume //CHIPS_MICVolControl(CHIPS_NORMAL); { extern DWORD __wMICVol; __wMICVol = MIC_VOL_DEFAULT ; HAL_WriteAM(HAL_AM_MIC_PCM_SCALE, __wMICVol); } */#endif // #ifndef NO_MIC_INPUT //set default AC3 downmix mode // Source 1KHz -20dB 5.1CH // CT908/MTK L R // LT/RT 0.57V 5.95V // L0/RO 4.66V 4.66V //CHIPS_DownMixMode(AC3_DOWNMIX_LORO); //kevin1.00, saved in Setup EEPROM //kevin0.76 HAL_WriteAM(HAL_AM_DRC_MODE, 2); //default: line out //kevin0.80 HAL_WriteAM(HAL_AM_BASS_MANAGE_CONFIG, 0); //kevin1.05, move from _ProgramACLK to fix audio channel mapping error // Need control [11:10] and [18:19] for internal audio DAC // LLY2.04, modify the setting for CT909S: Timer[31]=0, APB write channel[28]=0 // LLY2.11, enable PCM L/R channel inverse feature while I2S_ALIGN, bit[1] // Otherwise, the L/R channel output maybe wrong // LLY2.20, set bit[3:0] default value as zero, enable it by yourself if necessary // Since, the value is different for I2C_ALIGN // LLY2.20, always program bit[19:18] as 1 since internal Audio DAC only accept I2S format#if (AUDIO_ALIGN_FORMAT == I2S_ALIGN) dwTempReg = (BIT_RESOL_VALUE<<7) | (BIT_RESOL_VALUE<<4) | (ALIGN_VALUE<<2) | (1<<18) | (1<<1); //[31] timer#else dwTempReg = (BIT_RESOL_VALUE<<7) | (BIT_RESOL_VALUE<<4) | (ALIGN_VALUE<<2) | (1<<18); //[31] timer#endif // #if (AUDIO_ALIGN_FORMAT == I2S_ALIGN) // LLY2.61, re-modify the procedure for programming REG_AIU_SPORT_CONFG0 bit[16:13] // 1. only enable bit[13] (downmix L/R) while using internal audio DAC // 2. enable bit[16:13] (5.1 channel + downmix L/R) while internal + external audio DAC. // 3. enable bit[13] for 2 channel external audio DAC mode // 4. enable bit[16:14] for 5.1 channel external audio DAC mode // Notice: CT909P IC only support 2 channel only external audio DAC, so only can enable bit[13] // CT909R IC bit[16:13] must control together since H/W bug even internal audio DAC // or 2 channel only exteranl audio DAC // CT909G IC, bit[16:13] can be control indepentent. And, it's ok to enable all bit // even 2 channel only mode.#ifdef CT909P_IC_SYSTEM dwTempReg |= (0x1L<<13);#else // #ifdef CT909P_IC_SYSTEM dwTempReg |= (0xfL<<13);#endif // #ifdef CT909P_IC_SYSTEM // LLY2.56, do key lock first since AIU_SPORT_CONFG0 will be accessed by PROC2 together MACRO_PLAT_KEY_LOCK( ); REG_AIU_SPORT_CONFG0 = dwTempReg; MACRO_PLAT_KEY_UNLOCK( );// J500KWShih_220, set threshold for PCM FIFO, Ncahns[14:12], 3 for 5.1 + 2ch, 0 for 2ch only#ifndef SUPPORT_2_CHANNEL_ONLY //REG_AIU_REG184_ADDR |= 3 << 12; REG_AIU_WRFMT &= (~0x00007000); REG_AIU_WRFMT |= 0x00003000;#endif // SUPPORT_2_CHANNEL_ONLY// LLY2.17, used for internal ADAC programming.#ifdef ENABLE_INTERNAL_ADAC // LLY2.04, set bit[3] & [7] as zero to disable "left/right channel power donw mode" for internal audio DAC REG_AIU_DAC_CONFG0 &= ~0x88; // clear bit[19:8] for GAIN value first REG_AIU_DAC_CONFG0 &= (~0x000fff00); // Then, set the desired gain value base on pre-defined value. REG_AIU_DAC_CONFG0 |= (PARA_GAIN << 8);#endif // #ifdef ENABLE_INTERNAL_ADAC HAL_SetAudioDAC( AUDIO_FREQ_48K ); // LLY2.51, porting Chuan's code to turn on SPDIF for CT909P IC#ifdef CT909P_IC_SYSTEM // LLY2.55, only turn-on SPDIF output while solution support it. // ex. DMP952A don't support SPDIF output, and use the same pin for other feature.#ifndef NO_SPDIF_OUTPUT REG_PLAT_GPE_MUX |= 1; // Chuan, Turn on SPDIF#endif // #ifndef NO_SPDIF_OUTPUT#endif // #ifdef CT909P_IC_SYSTEM}void HAL_ResetAIUPCM(void){ REG_AIU_AIUEN |= AIU_DMA_ENABLE_PCM_OUT; MACRO_IDLE(); REG_AIU_AIUEN &= ~(AIU_DMA_ENABLE_PCM_OUT|0x200);}void HAL_InitVideo(void){}// LLY2.35 create ...#ifdef SET_AVI_BITS_BUFFER_BY_RATIO// ****************************************************************************************// Function : _Cal_Safe_ABuf_Size// Description : Only used to calculate a reasonable and safe audio buffer size// Arguments : dwSize, the parser original suggested buffer size// dwABuf1, the desired audio buffer 1 size// Return : The final audio buffer size// ****************************************************************************************DWORD _Cal_Safe_ABuf_Size(DWORD dwSize, DWORD dwABuf1){ extern BYTE __bAudioType; DWORD dwMinABuf; // A0 + A1 // Initial minimnu audio buffer size as audio 0 only dwMinABuf = MIN_LEN_FOR_A0BUF; // Must plus audio buffer 1 size if use two buffer case. if( (__bAudioType==HAL_AUDIO_WMA)#ifdef USE_2BUFF_FOR_MPEG_AUDIO || (__bAudioType==HAL_AUDIO_MPG) || (__bAudioType==HAL_AUDIOBUF_MP3)#endif // #ifdef USE_2BUFF_FOR_MPEG_AUDIO ) { dwSize += dwABuf1; dwMinABuf += dwABuf1; } // Do error checking that A0 + A1 limit <= min audio buffer size if(dwSize <= dwMinABuf) { dwSize = dwMinABuf; DBG_Printf(DBG_THREAD_CHEERDVD, DBG_INFO_PRINTF, "Err: min abuf must >= A0+A1 limit: %lx\n", dwMinABuf); } return dwSize;}// ****************************************************************************************// Function : HAL_Cal_BitsAddr// Description : Calculate A/V bits buffer address// Arguments : pBitsBuf_Addr, a struct pointer used to keep desired A/V buffer address// Return : None// Notice : Only used for AVI bits now.// ****************************************************************************************void HAL_Cal_BitsAddr(PBITS_BUF_ADDR pBitsBuf_Addr){ BYTE bVRatio; // keep video ratio DWORD dwVBufSize; // keep desired video buffer size DWORD dwMinABufSize; // keep minimun required audio buffer size DWORD dwABuf1Size;#ifndef PARTITION_JUST_ON_AV_RATIO extern BYTE __bASTNs; extern BYTE __bSPSTNs; extern BYTE __bASTID; extern BYTE __bAudioType;#endif // #ifndef PARTITION_JUST_ON_AV_RATIO // Step 0: Give the audio buffer 1 size first // If need it, set it as 5K DWORD, Otherwise, set it as 0 if( (__bAudioType==HAL_AUDIO_WMA)#ifdef USE_2BUFF_FOR_MPEG_AUDIO || (__bAudioType==HAL_AUDIO_MPG) || (__bAudioType==HAL_AUDIOBUF_MP3)#endif // #ifdef USE_2BUFF_FOR_MPEG_AUDIO ) { dwABuf1Size = MIN_LEN_FOR_A1BUF; } else { dwABuf1Size = 0x0L; } // Get Video stream ratio bVRatio = PARSER_getAVIVideoRatio(); // LLY2.37, add error protection while video stream ratio is 0 or 100 // Then, just config A/V buffer base on pre-defined address if( (bVRatio == 0) || (bVRatio == 100) ) { pBitsBuf_Addr->dwA0Start = DS_AD0BUF_ST_AVI; pBitsBuf_Addr->dwA0End = DS_AD0BUF_END_AVI; pBitsBuf_Addr->dwA1Start = DS_AD1BUF_ST_AVI; pBitsBuf_Addr->dwA1End = DS_AD1BUF_END_AVI; pBitsBuf_Addr->dwVStart = DS_VDBUF_ST_AVI; pBitsBuf_Addr->dwVEnd = DS_VDBUF_END_AVI; } else {#ifdef PARTITION_JUST_ON_AV_RATIO // Get video buffer size base on ratio dwVBufSize = AVI_AV_BUF_LEN * bVRatio / 100; // Let video size be 0x200 alignment (512 byte) if(dwVBufSize%0x200) { dwVBufSize = (dwVBufSize/0x200)*0x200; } // Get minimun audio buffer size dwMinABufSize = AVI_AV_BUF_LEN - dwVBufSize;#else // #ifdef PARTITION_JUST_ON_AV_RATIO // Step 2: Get minimun requirement audio buffer size dwMinABufSize = PARSER_getAVIAudioBufferSize(PARSER_getAVIAudioMaxBitrateTrackIndex());#ifdef DEBUG_AVI_BUFFER_RATIO DBG_Printf(DBG_THREAD_CHEERDVD, DBG_INFO_PRINTF, "Paser give max ABuf: %lx\n", dwMinABufSize);#endif // #ifdef DEBUG_AVI_BUFFER_RATIO dwMinABufSize = _Cal_Safe_ABuf_Size(dwMinABufSize, dwABuf1Size); // Step 4: Calculate minimum required A/V buffer size for two case // [1] Only one audio track: base A:V ratio to partition whole A/V buffer // [2] >=2 audio tracks: same as parser suggested minimum size // and same control for >=2 subpicture tracks -- LLY2.36 if( (__bASTNs >= 2) || (__bSPSTNs >= 2) ) { // Video buffer size = total size - max track one of parser suggested min audio size dwVBufSize = AVI_AV_BUF_LEN - dwMinABufSize; // Re-calculate audio buffer size base on desired audio track dwMinABufSize = PARSER_getAVIAudioBufferSize(__bASTID);#ifdef DEBUG_AVI_BUFFER_RATIO DBG_Printf(DBG_THREAD_CHEERDVD, DBG_INFO_PRINTF, "Paser give current ABuf: %lx\n", dwMinABufSize);#endif // #ifdef DEBUG_AVI_BUFFER_RATIO dwMinABufSize = _Cal_Safe_ABuf_Size(dwMinABufSize, dwABuf1Size); } else { dwVBufSize = AVI_AV_BUF_LEN * bVRatio / 100; // Let video buffer size be 0x200 alignment if(dwVBufSize%0x200) { dwVBufSize = (dwVBufSize/0x200)*0x200; }
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -