ctkav_platform.h

ct952 source code use for Digital Frame Photo

// -------------------------------------------------------------------------------------------------
#define PLAT_BYPASS_DCACHE_OFFSET       (0x80000000)
#define PLAT_BYPASS_DCACHE_STARTADR     (0xc0000000)
// =================================================================================================
// F100CSC_105, replace macro for supporting DCache power saving mode
// CT909 PROC1's cache size is 4-way 2KB (16 bytes per line).
// Flush one cache line needs around one cycle. So, we need to wait at least
// 2048/16 = 128 cycles.
#if 0
#define PLAT_PROC1_DCACHE_FLUSH         (REG_PLAT_CACHE_CONTROL|=(CACHE_FLUSH_DCACHE))
#else
#define PLAT_PROC1_DCACHE_FLUSH                                     \
    {                                                               \
        register DWORD dwIdle = 4;                                  \
        REG_PLAT_CACHE_CONTROL &= (~(CACHE_DCACHE_POWER_SAVING));   \
        REG_PLAT_CACHE_CONTROL |= CACHE_FLUSH_DCACHE;               \
        asm volatile ("udiv %0, %0, %%g0;" : : "r" (dwIdle) );      \
        asm volatile ("udiv %0, %0, %%g0;" : : "r" (dwIdle) );      \
        asm volatile ("udiv %0, %0, %%g0;" : : "r" (dwIdle) );      \
        asm volatile ("udiv %0, %0, %%g0;" : : "r" (dwIdle) );      \
        asm volatile ("udiv %0, %0, %%g0;" : : "r" (dwIdle) );      \
        REG_PLAT_CACHE_CONTROL |= CACHE_DCACHE_POWER_SAVING;        \
    }
#endif  // 0
// -------------------------------------------------------------------------------------------------
#if 0
#define PLAT_PROC1_CACHE_FLUSH          (REG_PLAT_CACHE_CONTROL|=(CACHE_FLUSH_DCACHE|CACHE_FLUSH_ICACHE))
#else
#define PLAT_PROC1_CACHE_FLUSH                                              \
    {                                                                       \
        register DWORD dwIdle = 4;                                          \
        REG_PLAT_CACHE_CONTROL &= (~(CACHE_DCACHE_POWER_SAVING));           \
        REG_PLAT_CACHE_CONTROL |= (CACHE_FLUSH_DCACHE|CACHE_FLUSH_ICACHE);  \
        asm volatile ("udiv %0, %0, %%g0;" : : "r" (dwIdle) );              \
        asm volatile ("udiv %0, %0, %%g0;" : : "r" (dwIdle) );              \
        asm volatile ("udiv %0, %0, %%g0;" : : "r" (dwIdle) );              \
        asm volatile ("udiv %0, %0, %%g0;" : : "r" (dwIdle) );              \
        asm volatile ("udiv %0, %0, %%g0;" : : "r" (dwIdle) );              \
        REG_PLAT_CACHE_CONTROL |= (CACHE_FLUSH_DCACHE|CACHE_FLUSH_ICACHE);  \
    }
#endif  // 0
// =================================================================================================
// J500CSC_111, update platform lock mechanism
// Since the REG_PLAT_COMMAND_ADDR, a APB register, has problem, we change to use
// DRAM space as semaphore. DS_PROC_SEMAPHORE is defined at ctkav.h and this address
// should be initialized to zero, done by MACRO_PLAT_KEY_UNLOCK, when H/W Power-on
// or PROC2 reset.
#if 0
    #define MACRO_PLAT_KEY_LOCK( )                                                          \
        {                                                                                   \
            register DWORD dwLock;                                                          \
            register DWORD dwSemaphoreAddr = REG_PLAT_COMMAND_ADDR;                         \
            register DWORD dwCounter = 100;                                                 \
                                                                                            \
            while( dwCounter -- )                                                           \
            {                                                                               \
                asm volatile("mov 0x01, %0": "=r" (dwLock));                                \
                asm volatile ("swap [%1], %0;" : "=r" (dwLock) : "r" (dwSemaphoreAddr) );   \
                if( dwLock == 0 )                                                           \
                {                                                                           \
                    break;                                                                  \
                }                                                                           \
                                                                                            \
                asm volatile ("nop; nop; nop; nop;");                                       \
            };                                                                              \
        }

    #define MACRO_PLAT_KEY_UNLOCK( )                                        \
        {                                                                   \
            register DWORD dwSemaphoreAddr = REG_PLAT_COMMAND_ADDR;         \
                                                                            \
            asm volatile ("swap [%0], %%g0;" : : "r" (dwSemaphoreAddr) );   \
        }
#else
    #define MACRO_PLAT_KEY_LOCK( )                                                              \
        {                                                                                       \
            register DWORD dwCounter = 4000;                                                    \
                                                                                                \
            while( dwCounter -- )                                                               \
            {                                                                                   \
                if( (REG_PLAT_COMMAND & 1) == 0 )                                               \
                {                                                                               \
                    break;                                                                      \
                }                                                                               \
                                                                                                \
                asm volatile ("nop; nop; nop; nop;");                                           \
            };                                                                                  \
        }

    #define MACRO_PLAT_KEY_UNLOCK( ) { REG_PLAT_COMMAND = 0; }

    // J500CSC_120, retrieve eCos kernel library's version
    #define MACRO_ECOS_VER( dwVer )     (dwVer = ecos_lib_ver);

    // J500CSC_120, provide access the exception error interface
    // Here we have exception number function & content of each index.
    // Index is counting from 1 to ... (64 is maximum for current setting).
    #define MACRO_GET_EXCEPTION_NUM( dwExceptionNum )                   \
        {                                                               \
            dwExceptionNum = hal_vsr_trace[0];                          \
        }

    #define MACRO_GET_EXCEPTION_INDEX( dwIndex, dwExceptionTT, dwExceptionPC )  \
        {                                                                       \
            dwExceptionTT = hal_vsr_trace[(dwIndex << 1) - 1];                  \
            dwExceptionPC = hal_vsr_trace[(dwIndex << 1)];                      \
        }
#endif  // 0
// -------------------------------------------------------------------------------------------------
#define MACRO_IDLE( )                                           \
    {                                                           \
        register DWORD dwIdle = 4;                              \
        asm volatile ("udiv %0, %0, %%g0;" : : "r" (dwIdle) );  \
    }
// -------------------------------------------------------------------------------------------------
#define DRAM_DUMMY      (*(volatile DWORD *)(0x403FFFF4L))
// -------------------------------------------------------------------------------------------------
#define MACRO_PLAT_RESET_WAITSTABLE( )          \
    {                                           \
        DRAM_DUMMY = 0xFFFFFFFF;                \
        DRAM_DUMMY = 0xFFFFFFFF;                \
        DRAM_DUMMY = 0xFFFFFFFF;                \
        DRAM_DUMMY = 0xFFFFFFFF;                \
        DRAM_DUMMY = 0xFFFFFFFF;                \
        DRAM_DUMMY = 0xFFFFFFFF;                \
    }
// =================================================================================================
// Define the meaning of DSU control bit (REG_PLAT_DSU_CONTROL/REG_PLAT_DSU2_CONTROL)
#define PLAT_DSU_CTL_TE         (0x00000001)
#define PLAT_DSU_CTL_DCM        (0x00000002)
#define PLAT_DSU_CTL_BT         (0x00000004)
#define PLAT_DSU_CTL_FT         (0x00000008)
#define PLAT_DSU_CTL_BE         (0x00000010)
#define PLAT_DSU_CTL_BW         (0x00000020)
#define PLAT_DSU_CTL_BS         (0x00000040)
#define PLAT_DSU_CTL_BN         (0x00000080)
#define PLAT_DSU_CTL_BB         (0x00000100)
#define PLAT_DSU_CTL_BX         (0x00000200)
#define PLAT_DSU_CTL_BZ         (0x00000400)
#define PLAT_DSU_CTL_DE         (0x00000800)
#define PLAT_DSU_CTL_DM         (0x00001000)
#define PLAT_DSU_CTL_EB         (0x00002000)
#define PLAT_DSU_CTL_EE         (0x00004000)
#define PLAT_DSU_CTL_PE         (0x00008000)
#define PLAT_DSU_CTL_SS         (0x00010000)
#define PLAT_DSU_CTL_LR         (0x00020000)
#define PLAT_DSU_CTL_DR         (0x00040000)
#define PLAT_DSU_CTL_RE         (0x00080000)
// -------------------------------------------------------------------------------------------------
#ifdef CT909P_IC_SYSTEM
#define PLAT_POWER_DOWN_HIV     (0x0200)
#define PLAT_POWER_DOWN_DD      (0x0400)
#define PLAT_POWER_DOWN_DC      (0x0800)
#define PLAT_POWER_DOWN_DY      (0x1000)
#define PLAT_POWER_DOWN_CVBS    (0x2000)
#define PLAT_POWER_DOWN_ALL     (0x4000)
#endif

#define MACRO_PLAT_GET_PROC2_PC( dwPC )                         \
    {                                                           \
        register DWORD dwIdle = 4;                              \
        REG_PLAT_PROC2_POWER_DOWN = 0xff;                       \
        asm volatile ("udiv %0, %0, %%g0;" : : "r" (dwIdle) );  \
        dwPC = REG_PLAT_PROC2_POWER_DOWN;                       \
    }
// -------------------------------------------------------------------------------------------------
#define MACRO_PLAT_HALT_PROC2( )                                    \
    {                                                               \
        register DWORD dwIdle = 4;