ctkav_platform.h

ct952 source code use for Digital Frame Photo

#define PLAT_RESET_AIU_ENABLE           (0x00000002)
#define PLAT_RESET_BIU_ENABLE           (0x00000004)
#define PLAT_RESET_UART1_ENABLE         (0x00000008)
#define PLAT_RESET_UART2_ENABLE         (0x00000010)
#define PLAT_RESET_IRQ1_ENABLE          (0x00000020)
#define PLAT_RESET_IRQ2_ENABLE          (0x00000040)
#define PLAT_RESET_TIMER_ENABLE         (0x00000080)
#define PLAT_RESET_VDEC_ENABLE          (0x00000100)
#define PLAT_RESET_VDEC2_ENABLE         (0x00000200)
#define PLAT_RESET_SERVO_ENABLE         (0x00000400)
#define PLAT_RESET_DSSP_ENABLE          (0x00000800)
#define PLAT_RESET_DVD_ENABLE           (0x00001000)
#define PLAT_RESET_CD_ENABLE            (0x00002000)
#define PLAT_RESET_ECC_ENABLE           (0x00004000)
#define PLAT_RESET_DPLL_ENABLE          (0x00008000)
#define PLAT_RESET_EDC_ENABLE           (0x00010000)
#define PLAT_RESET_RF_ENABLE            (0x00020000)
#define PLAT_RESET_DSU1_ENABLE          (0x00040000)
#define PLAT_RESET_DSU2_ENABLE          (0x00080000)
#define PLAT_RESET_VOU2_ENABLE          (0x00100000)
#define PLAT_RESET_IR_ENABLE            (0x00200000)
#ifndef CT909G_IC_SYSTEM
    #define PLAT_RESET_DVDIF_ENABLE         (0x00400000)    // 909G: del
#endif
#define PLAT_RESET_VPU_ENABLE           (0x00800000)
#define PLAT_RESET_PROM_ENABLE          (0x01000000)
#ifndef CT909G_IC_SYSTEM
    #define PLAT_RESET_ACP_ENABLE           (0x02000000)    // 909G: del
    #define PLAT_RESET_USB_ENABLE           (0x04000000)    // 909G: del
    #define PLAT_RESET_USBCLKCKT_ENABLE     (0x08000000)    // 909G: del
#endif
#define PLAT_RESET_VOU_ENABLE           (0x10000000)
#if defined(CT909P_IC_SYSTEM) || defined(CT909G_IC_SYSTEM)
    #define PLAT_RESET_AIU_DAC_ENABLE       (0x20000000)    // 909G: new
#endif
// -------------------------------------------------------------------------------------------------
// -------------------------------------------------------------------------------------------------
// define System Configuration-1 bits for REG_PLAT_SYSTEM_CONFIGURATION1
#ifndef CT909G_IC_SYSTEM
    #define PLAT_SYSCFG1_DVDIF_EN           (0x00080000)    // 909G: del
    #define PLAT_SYSCFG1_NIM_SEL_GPB        (0x00002000)    // 909G: del
#endif
// =================================================================================================
// define GPIO registers
#ifdef CT909P_IC_SYSTEM
// -------------------------------------------------------------------------------------------------
    #define REG_PLATFORM_GPIO_BASE          (IO_START+0x4004)                                       // 80004004
// -------------------------------------------------------------------------------------------------
    #define REG_PLAT_GPA_CLEAR              (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x00)))   // 4004 (909P)
    #define REG_PLAT_GPA_SET                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x04)))   // 4008 (909P)
    #define REG_PLAT_GPA_IO_DIR_CONTROL     (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x08)))   // 400c (909P)
    #define REG_PLAT_GPC_CLEAR              (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x0c)))   // 4010 (909P)
    #define REG_PLAT_GPC_SET                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x10)))   // 4014 (909P)
    #define REG_PLAT_GPC_IO_DIR_CONTROL     (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x14)))   // 4018 (909P)
    #define REG_PLAT_GPD_CLEAR              (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x18)))   // 401c (909P)
    #define REG_PLAT_GPD_SET                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x1c)))   // 4020 (909P)
    #define REG_PLAT_GPD_IO_DIR_CONTROL     (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x20)))   // 4024 (909P)
    #define REG_PLAT_GPE_CLEAR              (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x24)))   // 4028 (909P)
    #define REG_PLAT_GPE_SET                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x28)))   // 402c (909P)
    #define REG_PLAT_GPE_IO_DIR_CONTROL     (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x2c)))   // 4030 (909P)
    #define REG_PLAT_GPF_CLEAR              (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x30)))   // 4034 (909P)
    #define REG_PLAT_GPF_SET                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x34)))   // 4038 (909P)
    #define REG_PLAT_GPF_IO_DIR_CONTROL     (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x38)))   // 403c (909P)
    #define REG_PLAT_GPG_CLEAR              (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x3c)))   // 4040 (909P)
    #define REG_PLAT_GPG_SET                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x40)))   // 4044 (909P)
    #define REG_PLAT_GPG_IO_DIR_CONTROL     (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x44)))   // 4048 (909P)
    #define REG_PLAT_GPH_CLEAR              (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x48)))   // 404c (909P)
    #define REG_PLAT_GPH_SET                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x4c)))   // 4050 (909P)
    #define REG_PLAT_GPH_IO_DIR_CONTROL     (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x50)))   // 4054 (909P)
    #define REG_PLAT_GPA_MUX                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x54)))   // 4058 (909P)
    #define REG_PLAT_GPB_MUX                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x58)))   // 405c (909P)
    #define REG_PLAT_GPC_MUX                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x5c)))   // 4060 (909P)
    #define REG_PLAT_GPD_MUX                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x60)))   // 4064 (909P)
    #define REG_PLAT_GPD_MUX_EXT            (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x64)))   // 4068 (909P)
    #define REG_PLAT_GPE_MUX                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x68)))   // 406c (909P)
    #define REG_PLAT_GPF_MUX                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x6c)))   // 4070 (909P)
    #define REG_PLAT_GPG_MUX                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x70)))   // 4074 (909P)
#else
// -------------------------------------------------------------------------------------------------
    #define REG_PLATFORM_GPIO_BASE          (IO_START+0x330)                                        // 80000330
// -------------------------------------------------------------------------------------------------
    #define REG_PLAT_GPA_CLEAR              (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x00)))   // 0330
    #define REG_PLAT_GPA_SET                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x04)))   // 0334
    #define REG_PLAT_GPA_IO_DIR_CONTROL     (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x08)))   // 0338
    #define REG_PLAT_GPIO_INT_CONFIGURATION (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x0c)))   // 033c
    #ifdef CT909G_IC_SYSTEM
        #define REG_PLAT_GPC_CLEAR              (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x10)))   // 0340 (909G: new)
        #define REG_PLAT_GPC_SET                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x14)))   // 0344 (909G: new)
        #define REG_PLAT_GPC_IO_DIR_CONTROL     (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x18)))   // 0348 (909G: new)
        #define REG_PLAT_SCART_PWM_CONFIGURATION (*((volatile DWORD *)(REG_PLATFORM_GPIO_BASE+0x1c)))   // 034c (909G: new)
        #define REG_PLAT_GPB_CLEAR              (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x20)))   // 0350 (909G: new)
        #define REG_PLAT_GPB_SET                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x24)))   // 0354 (909G: new)
        #define REG_PLAT_GPB_IO_DIR_CONTROL     (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x28)))   // 0358 (909G: new)
    #else
        #define REG_PLAT_GPCDE_CLEAR            (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x10)))   // 0340
        #define REG_PLAT_GPCDE_SET              (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x14)))   // 0344
        #define REG_PLAT_GPCDE_IO_DIR_CONTROL   (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x18)))   // 0348
        #define REG_PLAT_GPF_CLEAR              (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x1c)))   // 034c
        #define REG_PLAT_GPF_SET                (*((volatile DWORD *) (REG_PLATFORM_GPIO_BASE+0x20)))   // 0350
    #endif
#endif
// =================================================================================================
// define Pad IO registers
#ifdef CT909G_IC_SYSTEM
// -------------------------------------------------------------------------------------------------
    #define REG_PLATFORM_PADIO_BASE         (IO_START+0x2980)                                           // 2980
// -------------------------------------------------------------------------------------------------
    #define REG_PLAT_MA_IEDS                (*((volatile DWORD *) (REG_PLATFORM_PADIO_BASE+0x00)))      // 2980 (909G: new)
    #define REG_PLAT_MA_PEPS                (*((volatile DWORD *) (REG_PLATFORM_PADIO_BASE+0x04)))      // 2984 (909G: new)
    #define REG_PLAT_MD_IEDS                (*((volatile DWORD *) (REG_PLATFORM_PADIO_BASE+0x08)))      // 2988 (909G: new)
    #define REG_PLAT_MD_PEPS                (*((volatile DWORD *) (REG_PLATFORM_PADIO_BASE+0x0c)))      // 298c (909G: new)
    #define REG_PLAT_MMISC_IEDS             (*((volatile DWORD *) (REG_PLATFORM_PADIO_BASE+0x10)))      // 2990 (909G: new)
    #define REG_PLAT_MMISC_PEPS             (*((volatile DWORD *) (REG_PLATFORM_PADIO_BASE+0x14)))      // 2994 (909G: new)
    #define REG_PLAT_GPA_IEDS               (*((volatile DWORD *) (REG_PLATFORM_PADIO_BASE+0x18)))      // 2998 (909G: new)
    #define REG_PLAT_GPA_PEPS               (*((volatile DWORD *) (REG_PLATFORM_PADIO_BASE+0x1c)))      // 299c (909G: new)
    #define REG_PLAT_GPB_IEDS               (*((volatile DWORD *) (REG_PLATFORM_PADIO_BASE+0x20)))      // 29a0 (909G: new)
    #define REG_PLAT_GPB_PEPS               (*((volatile DWORD *) (REG_PLATFORM_PADIO_BASE+0x24)))      // 29a4 (909G: new)
    #define REG_PLAT_GPC_IEDS               (*((volatile DWORD *) (REG_PLATFORM_PADIO_BASE+0x28)))      // 29a8 (909G: new)
    #define REG_PLAT_GPC_PEPS               (*((volatile DWORD *) (REG_PLATFORM_PADIO_BASE+0x2c)))      // 29ac (909G: new)
    #define REG_PLAT_MISC_PEPS              (*((volatile DWORD *) (REG_PLATFORM_PADIO_BASE+0x34)))      // 29b4 (909G: new)
#endif
// =================================================================================================
// define Mode Selection registers
#ifdef CT909P_IC_SYSTEM
// -------------------------------------------------------------------------------------------------
    #define REG_PLATFORM_MODE_SEL_BASE      (IO_START+0x4078)                                           // 80004078
// -------------------------------------------------------------------------------------------------
    #define REG_PLAT_VPLUS_MODE_SEL         (*((volatile DWORD *) (REG_PLATFORM_MODE_SEL_BASE+0x00)))   // 4078 (909P)
    #define REG_PLAT_CT909S_TEST_MODE_SEL   (*((volatile DWORD *) (REG_PLATFORM_MODE_SEL_BASE+0x04)))   // 407C (909P)
    #define REG_PLAT_DAC_MODE_SEL           (*((volatile DWORD *) (REG_PLATFORM_MODE_SEL_BASE+0x08)))   // 4080 (909P)
#endif
// =================================================================================================
// define Command registers
#define REG_PLATFORM_COMMAND_BASE       (IO_START+0x360)                                            // 80000360
// -------------------------------------------------------------------------------------------------
#define REG_PLAT_COMMAND                (*((volatile DWORD *) (REG_PLATFORM_COMMAND_BASE+0x00)))    // 0360
#define REG_PLAT_COMMAND_ADDR           (REG_PLATFORM_COMMAND_BASE+0x00)
#define REG_PLAT_PARAMETER1             (*((volatile DWORD *) (REG_PLATFORM_COMMAND_BASE+0x04)))    // 0364
#define REG_PLAT_PARAMETER2             (*((volatile DWORD *) (REG_PLATFORM_COMMAND_BASE+0x08)))    // 0368
#define REG_PLAT_PARAMETER3             (*((volatile DWORD *) (REG_PLATFORM_COMMAND_BASE+0x0c)))    // 036c
#define REG_PLAT_PARAMETER4             (*((volatile DWORD *) (REG_PLATFORM_COMMAND_BASE+0x10)))    // 0370
// -------------------------------------------------------------------------------------------------
// REG_PLAT_PARAMETER3 [31:28]: ID. 1: PTS, 2: Skip, 3: STC Updated
// REG_PLAT_PARAMETER3 [27:24]: Loop Cnt: 0~7.
// REG_PLAT_PARAMETER3 [23:0]: Address. Ex 123456 indicate address(0x40123456)
// REG_PLAT_PARAMETER4 [31:0]: PTS Value
// -------------------------------------------------------------------------------------------------
// -------------------------------------------------------------------------------------------------
#define PLAT_CMDID_NULL                 (0x00000000)
#define PLAT_CMDID_PTS                  (0x10000000)
#define PLAT_CMDID_SKIP                 (0x20000000)
#define PLAT_CMDID_STCUPDATED           (0x30000000)
#define PLAT_CMDID_STCUPDATED_VIDEO     (0x40000000)
// =================================================================================================
// define IR Control registers
// -------------------------------------------------------------------------------------------------
#define REG_PLATFORM_IR_BASE            (IO_START+0x380)                                      // 80000380
// -------------------------------------------------------------------------------------------------
#define REG_PLAT_IR_TIMING_CONTROL1     (*((volatile DWORD *) (REG_PLATFORM_IR_BASE+0x00)))   // 0380
#define REG_PLAT_IR_TIMING_CONTROL2     (*((volatile DWORD *) (REG_PLATFORM_IR_BASE+0x04)))   // 0384
#define REG_PLAT_IR_TIMING_CONTROL3     (*((volatile DWORD *) (REG_PLATFORM_IR_BASE+0x08)))   // 0388
#define REG_PLAT_IR_TIMING_CONTROL4     (*((volatile DWORD *) (REG_PLATFORM_IR_BASE+0x0c)))   // 038c
#define REG_PLAT_IR_DATA                (*((volatile DWORD *) (REG_PLATFORM_IR_BASE+0x10)))   // 0390
#define REG_PLAT_IR_RAW_CODE            (*((volatile DWORD *) (REG_PLATFORM_IR_BASE+0x14)))   // 0394
#define REG_PLAT_IR_COUNTER             (*((volatile DWORD *) (REG_PLATFORM_IR_BASE+0x18)))   // 0398
#define REG_PLAT_IR_STATUS              (*((volatile DWORD *) (REG_PLATFORM_IR_BASE+0x1c)))   // 039c
// =================================================================================================
// define IC ID (Software version number) register. (ref. VPU Spec.)
#define REG_PLAT_IC_ID                  (*((volatile DWORD *) (IO_START+0x28c8)))             // 28c8
// =================================================================================================