ctkav_platform.h

ct952 source code use for Digital Frame Photo

// =================================================================================================
#ifndef __CTKAV_PLATFORM_H__
#define __CTKAV_PLATFORM_H__
// =================================================================================================
#ifdef __cplusplus
extern "C" {
#endif //__cplusplus
// =================================================================================================
// define PROC's on-chip registers
// H/W will remap following PROC2's addresses and let DSUMON (GRMON) work as normal
// -- DSU UART, CACHE CONTROL, POWER DOWN, CONFIGURATION
// -- DSU's internal registers from 0x90000000
// This makes PROC2 can not see the same register addresses for PROC1.
// =================================================================================================
#define IO_START                        (CT909_IO_START)
// =================================================================================================
#define REG_PLATFORM_ON_CHIP_BASE       (IO_START)                                                  // 80000000
// -------------------------------------------------------------------------------------------------
#define REG_PLAT_AHB_FAILING_ADDR       (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x00c)))   // 000c
#define REG_PLAT_AHB_STATUS             (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x010)))   // 0010
#define REG_PLAT_CACHE_CONTROL          (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x014)))   // 0014
#define REG_PLAT_POWER_DOWN             (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x018)))   // 0018
#define REG_PLAT_WRITE_PROTECTION1      (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x01c)))   // 001c
#define REG_PLAT_WRITE_PROTECTION2      (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x020)))   // 0020
#define REG_PLAT_CONFIGURATION          (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x024)))   // 0024
// -------------------------------------------------------------------------------------------------
#define REG_PLAT_TIMER1_COUNTER         (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x040)))   // 0040
#define REG_PLAT_TIMER1_RELOAD          (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x044)))   // 0044
#define REG_PLAT_TIMER1_CONTROL         (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x048)))   // 0048
#define REG_PLAT_WATCHDOG               (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x04c)))   // 004c
#define REG_PLAT_TIMER2_COUNTER         (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x050)))   // 0050
#define REG_PLAT_TIMER2_RELOAD          (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x054)))   // 0054
#define REG_PLAT_TIMER2_CONTROL         (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x058)))   // 0058
#define REG_PLAT_PRESCALER_COUNTER      (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x060)))   // 0060
#define REG_PLAT_PRESCALER_RELOAD       (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x064)))   // 0064
#define REG_PLAT_TIMER3_CONTROL         (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x068)))   // 0068
#define REG_PLAT_TIMER3_VALUE           (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x06c)))   // 006c
#define REG_PLAT_TIMER3_VALUE_ADDR      ((DWORD)(&REG_PLAT_TIMER3_VALUE))                           // =006c
// -------------------------------------------------------------------------------------------------
#define REG_PLAT_UART1_DATA             (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x070)))   // 0070
#define REG_PLAT_UART1_STATUS           (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x074)))   // 0074
#define REG_PLAT_UART1_CONTROL          (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x078)))   // 0078
#define REG_PLAT_UART1_SCALER           (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x07c)))   // 007c
#define REG_PLAT_UART2_DATA             (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x080)))   // 0080
#define REG_PLAT_UART2_STATUS           (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x084)))   // 0084
#define REG_PLAT_UART2_CONTROL          (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x088)))   // 0088
#define REG_PLAT_UART2_SCALER           (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x08c)))   // 008c
#define REG_PLAT_UART_DATA(n)           (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x070+((n) << 4))))  // 0070 or 0080
#define REG_PLAT_UART_STATUS(n)         (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x074+((n) << 4))))  // 0074 or 0084
#define REG_PLAT_UART_CONTROL(n)        (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x078+((n) << 4))))  // 0078 or 0088
#define REG_PLAT_UART_SCALER(n)         (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x07c+((n) << 4))))  // 007c or 008c
// -------------------------------------------------------------------------------------------------
#define REG_PLAT_INT_MASK_PRIORITY      (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x090)))   // 0090
#define REG_PLAT_INT_PENDING            (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x094)))   // 0094
#define REG_PLAT_INT_FORCE              (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x098)))   // 0098
#define REG_PLAT_INT_CLEAR              (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x09c)))   // 009c
// -------------------------------------------------------------------------------------------------
#define REG_PLAT_PROC1_1ST_INT_MASK_ENABLE      (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x0b0)))   // 00b0 (RW)
#define REG_PLAT_PROC1_1ST_INT_MASK_DISABLE     (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x0bc)))   // 00bc (W)
#define REG_PLAT_PROC1_1ST_INT_PENDING_ENABLE   REG_PLAT_PROC1_1ST_INT_PENDING  // (RW)
#define REG_PLAT_PROC1_1ST_INT_PENDING_DISABLE  REG_PLAT_PROC1_1ST_INT_CLEAR    // (W)
#define REG_PLAT_PROC1_1ST_INT_PENDING  (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x0b4)))   // 00b4 (RW)
#define REG_PLAT_PROC1_1ST_INT_STATUS   (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x0b8)))   // 00b8 (R)
#define REG_PLAT_PROC1_1ST_INT_CLEAR    (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x0b8)))   // 00b8 (W)
// -------------------------------------------------------------------------------------------------
#define REG_PLAT_DSU_UART_STATUS        (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x0c4)))   // 00c4
#define REG_PLAT_DSU_UART_CONTROL       (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x0c8)))   // 00c8
#define REG_PLAT_DSU_UART_SCALER        (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x0cc)))   // 00cc
// -------------------------------------------------------------------------------------------------
#define REG_PLAT_PROC1_2ND_INT_MASK_ENABLE      (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x0d0)))   // 00d0 (RW)
#define REG_PLAT_PROC1_2ND_INT_MASK_DISABLE     (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x0dc)))   // 00dc (W)
#define REG_PLAT_PROC1_2ND_INT_PENDING_ENABLE   REG_PLAT_PROC1_2ND_INT_PENDING  // (RW)
#define REG_PLAT_PROC1_2ND_INT_PENDING_DISABLE  REG_PLAT_PROC1_2ND_INT_CLEAR    // (W)
#define REG_PLAT_PROC1_2ND_INT_PENDING  (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x0d4)))   // 00d4 (RW)
#define REG_PLAT_PROC1_2ND_INT_STATUS   (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x0d8)))   // 00d8 (R)
#define REG_PLAT_PROC1_2ND_INT_CLEAR    (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x0d8)))   // 00d8 (W)
// -------------------------------------------------------------------------------------------------
#define REG_PLAT_PROC2_CACHE_CONTROL    (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x114)))   // 0114
#define REG_PLAT_PROC2_POWER_DOWN       (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x118)))   // 0118
#define REG_PLAT_PROC2_CONFIGURATION    (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x124)))   // 0124
// -------------------------------------------------------------------------------------------------
#define REG_PLAT_PROC2_INT_MASK_PRIORITY (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x190)))  // 0190
#define REG_PLAT_PROC2_INT_PENDING      (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x194)))   // 0194
#define REG_PLAT_PROC2_INT_FORCE        (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x198)))   // 0198
#define REG_PLAT_PROC2_INT_CLEAR        (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x19c)))   // 019c
// -------------------------------------------------------------------------------------------------
#define REG_PLAT_PROC2_1ST_INT_MASK_ENABLE      (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x1b0)))   // 01b0 (RW)
#define REG_PLAT_PROC2_1ST_INT_MASK_DISABLE     (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x1bc)))   // 01bc (W)
#define REG_PLAT_PROC2_1ST_INT_PENDING_ENABLE   REG_PLAT_PROC2_1ST_INT_PENDING  // (RW)
#define REG_PLAT_PROC2_1ST_INT_PENDING_DISABLE  REG_PLAT_PROC2_1ST_INT_CLEAR    // (W)
#define REG_PLAT_PROC2_1ST_INT_PENDING          (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x1b4)))   // 01b4 (RW)
#define REG_PLAT_PROC2_1ST_INT_STATUS           (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x1b8)))   // 01b8 (R)
#define REG_PLAT_PROC2_1ST_INT_CLEAR            (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x1b8)))   // 01b8 (W)
// -------------------------------------------------------------------------------------------------
#define REG_PLAT_PROC2_DSU_UART_STATUS  (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x1c4)))   // 01c4
#define REG_PLAT_PROC2_DSU_UART_CONTROL (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x1c8)))   // 01c8
#define REG_PLAT_PROC2_DSU_UART_SCALER  (*((volatile DWORD *) (REG_PLATFORM_ON_CHIP_BASE+0x1cc)))   // 01cc
// -------------------------------------------------------------------------------------------------
#define REG_PLAT_PROC2_PC               (REG_PLAT_DSU2_PC)
// -------------------------------------------------------------------------------------------------
// -------------------------------------------------------------------------------------------------
// define timer bits
#define TIMER_ENABLE                    (0x00000001)
#define TIMER_RELOAD_COUNTER            (0x00000002)
#define TIMER_LOAD_COUNTER              (0x00000004)
// -------------------------------------------------------------------------------------------------
// -------------------------------------------------------------------------------------------------
// define interrupt bits
#define INT_AHB_ERROR                   (0x00000002)
#define INT_UART2                       (0x00000004)
#define INT_UART1                       (0x00000008)
#define INT_TIMER1                      (0x00000100)
#define INT_TIMER2                      (0x00000200)
#define INT_PROC1_2ND                   (0x00000400)
#define INT_SOFTWARE                    (0x00000800)
#define INT_PROC1_1ST                   (0x00002000)
#if defined(CT909P_IC_SYSTEM) || defined(CT909G_IC_SYSTEM)
    #define INT_TIMER_SPORT                 (0x00000040)  // 909P/909G: renum from 0x1000
    #define INT_PROC2_1ST                   (0x00000080)  // 909P/909G: renum from 0x4000
    #define INT_IR                          (0x00001000)  // 909P/909G: new
#else
    #define INT_GPIO1                       (0x00000010)
    #define INT_GPIO2                       (0x00000020)
    #define INT_GPIO3                       (0x00000040)
    #define INT_TIMER_SPORT                 (0x00001000)
    #define INT_PROC2_1ST                   (0x00004000)
#endif

// define interrupt number
#define INT_NO_AHB_ERROR                (0x00000001)
#define INT_NO_UART2                    (0x00000002)
#define INT_NO_UART1                    (0x00000003)
#define INT_NO_TIMER1                   (0x00000008)
#define INT_NO_TIMER2                   (0x00000009)
#define INT_NO_PROC1_2ND                (0x0000000a)
#define INT_NO_SOFTWARE                 (0x0000000b)
#define INT_NO_PROC1_1ST                (0x0000000d)
#if defined(CT909P_IC_SYSTEM) || defined(CT909G_IC_SYSTEM)
    #define INT_NO_TIMER_SPORT              (0x00000006)  // 909P/909G: renum from 0xc
    #define INT_NO_PROC2_1ST                (0x00000007)  // 909P/909G: renum from 0xe
    #define INT_NO_IR                       (0x0000000c)  // 909P/909G: new
#else
    #define INT_NO_GPIO1                    (0x00000004)
    #define INT_NO_GPIO2                    (0x00000005)
    #define INT_NO_GPIO3                    (0x00000006)
    #define INT_NO_TIMER_SPORT              (0x0000000c)
    #define INT_NO_PROC2_1ST                (0x0000000e)
#endif
// -------------------------------------------------------------------------------------------------
// define interrupt bit for INT_PROC1_1ST
#define INT_PROC1_1ST_VSYNC             (0x00000001)
#define INT_PROC1_1ST_HSYNC             (0x00000002)
#define INT_PROC1_1ST_SCREEN_END        (0x00000004)
#define INT_PROC1_1ST_MAIN_END          (0x00000008)
#define INT_PROC1_1ST_OSD_END           (0x00000010)
#define INT_PROC1_1ST_RL_DONE           (0x00000020)
#define INT_PROC1_1ST_MC_DONE           (0x00000040)
#define INT_PROC1_1ST_INT_16L           (0x00000080)
// -------------------------------------------------------------------------------------------------
// define interrupt bit for INT_PROC1_2ND
#ifndef CT909G_IC_SYSTEM
    #define INT_PROC1_2ND_USB_OHCI          (0x00000001)    // 909G: del
#endif
#define INT_PROC1_2ND_SERVO             (0x00000002)
#define INT_PROC1_2ND_IR                (0x00000004)
#define INT_PROC1_2ND_STBBUF_UNDERFLOW  (0x00000008)
#define INT_PROC1_2ND_BIU               (0x00000010)
#define INT_PROC1_2ND_MCU_BSRD          (0x00000020)
#define INT_PROC1_2ND_MCU_ECCRD         (0x00000040)
#define INT_PROC1_2ND_MCU_EDCRD         (0x00000080)