📄 wdt4mdefination.h
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#define CCTL0_ (0x0162) /* Timer A Capture/Compare Control 0 */
sfrw CCTL0 = CCTL0_;
#define CCTL1_ (0x0164) /* Timer A Capture/Compare Control 1 */
sfrw CCTL1 = CCTL1_;
#define CCTL2_ (0x0166) /* Timer A Capture/Compare Control 2 */
sfrw CCTL2 = CCTL2_;
#define CCR0_ (0x0172) /* Timer A Capture/Compare 0 */
sfrw CCR0 = CCR0_;
#define CCR1_ (0x0174) /* Timer A Capture/Compare 1 */
sfrw CCR1 = CCR1_;
#define CCR2_ (0x0176) /* Timer A Capture/Compare 2 */
sfrw CCR2 = CCR2_;
#define TASSEL2 (0x0400) /* unused */ /* to distinguish from USART SSELx */
#define TASSEL1 (0x0200) /* Timer A clock source select 0 */
#define TASSEL0 (0x0100) /* Timer A clock source select 1 */
#define ID1 (0x0080) /* Timer A clock input devider 1 */
#define ID0 (0x0040) /* Timer A clock input devider 0 */
#define MC1 (0x0020) /* Timer A mode control 1 */
#define MC0 (0x0010) /* Timer A mode control 0 */
#define TACLR (0x0004) /* Timer A counter clear */
#define TAIE (0x0002) /* Timer A counter interrupt enable */
#define TAIFG (0x0001) /* Timer A counter interrupt flag */
#define MC_0 (0*0x10) /* Timer A mode control: 0 - Stop */
#define MC_1 (1*0x10) /* Timer A mode control: 1 - Up to CCR0 */
#define MC_2 (2*0x10) /* Timer A mode control: 2 - Continous up */
#define MC_3 (3*0x10) /* Timer A mode control: 3 - Up/Down */
#define ID_0 (0*0x40) /* Timer A input divider: 0 - /1 */
#define ID_1 (1*0x40) /* Timer A input divider: 1 - /2 */
#define ID_2 (2*0x40) /* Timer A input divider: 2 - /4 */
#define ID_3 (3*0x40) /* Timer A input divider: 3 - /8 */
#define TASSEL_0 (0*0x100) /* Timer A clock source select: 0 - TACLK */
#define TASSEL_1 (1*0x100) /* Timer A clock source select: 1 - ACLK */
#define TASSEL_2 (2*0x100) /* Timer A clock source select: 2 - SMCLK */
#define TASSEL_3 (3*0x100) /* Timer A clock source select: 3 - INCLK */
#define CM1 (0x8000) /* Capture mode 1 */
#define CM0 (0x4000) /* Capture mode 0 */
#define CCIS1 (0x2000) /* Capture input select 1 */
#define CCIS0 (0x1000) /* Capture input select 0 */
#define SCS (0x0800) /* Capture sychronize */
#define SCCI (0x0400) /* Latched capture signal (read) */
#define CAP (0x0100) /* Capture mode: 1 /Compare mode : 0 */
#define OUTMOD2 (0x0080) /* Output mode 2 */
#define OUTMOD1 (0x0040) /* Output mode 1 */
#define OUTMOD0 (0x0020) /* Output mode 0 */
#define CCIE (0x0010) /* Capture/compare interrupt enable */
#define CCI (0x0008) /* Capture input signal (read) */
#define OUT (0x0004) /* PWM Output signal if output mode 0 */
#define COV (0x0002) /* Capture/compare overflow flag */
#define CCIFG (0x0001) /* Capture/compare interrupt flag */
#define OUTMOD_0 (0*0x20) /* PWM output mode: 0 - output only */
#define OUTMOD_1 (1*0x20) /* PWM output mode: 1 - set */
#define OUTMOD_2 (2*0x20) /* PWM output mode: 2 - PWM toggle/reset */
#define OUTMOD_3 (3*0x20) /* PWM output mode: 3 - PWM set/reset */
#define OUTMOD_4 (4*0x20) /* PWM output mode: 4 - toggle */
#define OUTMOD_5 (5*0x20) /* PWM output mode: 5 - Reset */
#define OUTMOD_6 (6*0x20) /* PWM output mode: 6 - PWM toggle/set */
#define OUTMOD_7 (7*0x20) /* PWM output mode: 7 - PWM reset/set */
#define CCIS_0 (0*0x1000) /* Capture input select: 0 - CCIxA */
#define CCIS_1 (1*0x1000) /* Capture input select: 1 - CCIxB */
#define CCIS_2 (2*0x1000) /* Capture input select: 2 - GND */
#define CCIS_3 (3*0x1000) /* Capture input select: 3 - Vcc */
#define CM_0 (0*0x4000) /* Capture mode: 0 - disabled */
#define CM_1 (1*0x4000) /* Capture mode: 1 - pos. edge */
#define CM_2 (2*0x4000) /* Capture mode: 1 - neg. edge */
#define CM_3 (3*0x4000) /* Capture mode: 1 - both edges */
/*************************************************************
* Flash Memory
*************************************************************/
#define FCTL1_ (0x0128) /* FLASH Control 1 */
sfrw FCTL1 = FCTL1_;
#define FCTL2_ (0x012A) /* FLASH Control 2 */
sfrw FCTL2 = FCTL2_;
#define FCTL3_ (0x012C) /* FLASH Control 3 */
sfrw FCTL3 = FCTL3_;
#define FRKEY (0x9600) /* Flash key returned by read */
#define FWKEY (0xA500) /* Flash key for write */
#define FXKEY (0x3300) /* for use with XOR instruction */
#define ERASE (0x0002) /* Enable bit for Flash segment erase */
#define MERAS (0x0004) /* Enable bit for Flash mass erase */
#define WRT (0x0040) /* Enable bit for Flash write */
#define BLKWRT (0x0080) /* Enable bit for Flash segment write */
#define SEGWRT (0x0080) /* old definition */ /* Enable bit for Flash segment write */
#define FN0 (0x0001) /* Devide Flash clock by 1 to 64 using FN0 to FN5 according to: */
#define FN1 (0x0002) /* 32*FN5 + 16*FN4 + 8*FN3 + 4*FN2 + 2*FN1 + FN0 + 1 */
#define FN2 (0x0004)
#define FN3 (0x0008)
#define FN4 (0x0010)
#define FN5 (0x0020)
#define FSSEL0 (0x0040) /* Flash clock select 0 */ /* to distinguish from USART SSELx */
#define FSSEL1 (0x0080) /* Flash clock select 1 */
#define FSSEL_0 (0x0000) /* Flash clock select: 0 - ACLK */
#define FSSEL_1 (0x0040) /* Flash clock select: 1 - MCLK */
#define FSSEL_2 (0x0080) /* Flash clock select: 2 - SMCLK */
#define FSSEL_3 (0x00C0) /* Flash clock select: 3 - SMCLK */
#define BUSY (0x0001) /* Flash busy: 1 */
#define KEYV (0x0002) /* Flash Key violation flag */
#define ACCVIFG (0x0004) /* Flash Access violation flag */
#define WAIT (0x0008) /* Wait flag for segment write */
#define LOCK (0x0010) /* Lock bit: 1 - Flash is locked (read only) */
#define EMEX (0x0020) /* Flash Emergency Exit */
/************************************************************
* Comparator A
************************************************************/
#define CACTL1_ (0x0059) /* Comparator A Control 1 */
sfrb CACTL1 = CACTL1_;
#define CACTL2_ (0x005A) /* Comparator A Control 2 */
sfrb CACTL2 = CACTL2_;
#define CAPD_ (0x005B) /* Comparator A Port Disable */
sfrb CAPD = CAPD_;
#define CAIFG (0x01) /* Comp. A Interrupt Flag */
#define CAIE (0x02) /* Comp. A Interrupt Enable */
#define CAIES (0x04) /* Comp. A Int. Edge Select: 0:rising / 1:falling */
#define CAON (0x08) /* Comp. A enable */
#define CAREF0 (0x10) /* Comp. A Internal Reference Select 0 */
#define CAREF1 (0x20) /* Comp. A Internal Reference Select 1 */
#define CARSEL (0x40) /* Comp. A Internal Reference Enable */
#define CAEX (0x80) /* Comp. A Exchange Inputs */
#define CAREF_0 (0x00) /* Comp. A Int. Ref. Select 0 : Off */
#define CAREF_1 (0x10) /* Comp. A Int. Ref. Select 1 : 0.25*Vcc */
#define CAREF_2 (0x20) /* Comp. A Int. Ref. Select 2 : 0.5*Vcc */
#define CAREF_3 (0x30) /* Comp. A Int. Ref. Select 3 : Vt*/
#define CAOUT (0x01) /* Comp. A Output */
#define CAF (0x02) /* Comp. A Enable Output Filter */
#define P2CA0 (0x04) /* Comp. A Connect External Signal to CA0 : 1 */
#define P2CA1 (0x08) /* Comp. A Connect External Signal to CA1 : 1 */
#define CACTL24 (0x10)
#define CACTL25 (0x20)
#define CACTL26 (0x40)
#define CACTL27 (0x80)
#define CAPD0 (0x01) /* Comp. A Disable Input Buffer of Port Register .0 */
#define CAPD1 (0x02) /* Comp. A Disable Input Buffer of Port Register .1 */
#define CAPD2 (0x04) /* Comp. A Disable Input Buffer of Port Register .2 */
#define CAPD3 (0x08) /* Comp. A Disable Input Buffer of Port Register .3 */
#define CAPD4 (0x10) /* Comp. A Disable Input Buffer of Port Register .4 */
#define CAPD5 (0x20) /* Comp. A Disable Input Buffer of Port Register .5 */
#define CAPD6 (0x40) /* Comp. A Disable Input Buffer of Port Register .6 */
#define CAPD7 (0x80) /* Comp. A Disable Input Buffer of Port Register .7 */
/************************************************************
* Interrupt Vectors (offset from 0xFFE0)
************************************************************/
#define BASICTIMER_VECTOR (0 * 2) /* 0xFFE0 Basic Timer */
#define PORT2_VECTOR (1 * 2) /* 0xFFE2 Port 2 */
#define PORT1_VECTOR (4 * 2) /* 0xFFE8 Port 1 */
#define TIMERA1_VECTOR (5 * 2) /* 0xFFEA Timer A CC1-2, TA */
#define TIMERA0_VECTOR (6 * 2) /* 0xFFEC Timer A CC0 */
#define WDT_VECTOR (10 * 2) /* 0xFFF4 Watchdog Timer */
#define COMPARATORA_VECTOR (11 * 2) /* 0xFFF6 Comparator A */
#define NMI_VECTOR (14 * 2) /* 0xFFFC Non-maskable */
#define RESET_VECTOR (15 * 2) /* 0xFFFE Reset [Highest Priority] */
/************************************************************
* End of Modules
************************************************************/
#endif /* #ifndef __msp430x41x */
//********************************* Defination ********************************//
//* Pehaps We should pre-define some constant, thus we could program easily! **//
/* You know this is a control system for a kind of watermeter, now we have some explanain
for it. At first, we have some special KARD for the meter, named SETUP,USER,MANAGE,CLEAR,
CHECK,CALIBRATE,TEST,ENGINEERING(设置、用户、管理、清零、校验、校表、测试、工程).
Oh! Too many! Almost make me crazy! The cardtype is E5551 which made by Altemal? */
//********************* Some Explanation about System clock ********************//
;---------说明------------
;ACLK=32768HZ/8=4096HZ供蜂鸣器使用
;MCLK=32768HZ,正常运行之时
;MCLK=1024KHZ,存在数据RF收发或EEPROM读写数据
;BASIC TIMER用于LCD,CLOCK,各种延时
;TIMER_A用于RF收发的定时
;当蜂鸣器鸣叫或RF收发或EEPROM读写时不进入睡眠
;时间处理和计数处理应放在中断完成
;DATE可能是程序内部的关键字
;射频卡设置:1.不加密读1－7数据块000880E8; 2.加密读1－6数据块000882D8
//040611 040818
//************************** Head file including ******************************//
// #include "msp430x41x.h"
//************************** Some Constant defination **************************//
PWSET1 SET 0DAH ;设置卡统一主密码DAEC0428
PWSET2 SET 0ECH
PWSET3 SET 04H
PWSET4 SET 28H
T_V_TIM_ SET 4 ;开关阀门的时间(单位:秒) 040610
T_V_TIM1_ SET 4 ;040610
T_V_TIM2_ SET 2
//T_V_TIM_1 SET 10 ;开关阀门的时间(单位:秒)
//T_V_TIM_2 SET 8 ;开关阀门的时间(单位:秒)
T_V_MAX_ SET 10 ;阀门检验开启时间
RD_ SET 10100001B ;EEPROM读代码
WR_ SET 10100000B ;EEPROM写代码
T05P SET 128 ;TIMER_A输入频率1.024MHZ,125us
T10P SET 256 ;1.0P的时间,250us
T15P SET 384 ;1.5P的时间,375us
T20P SET 512 ;2.0P的时间,500us
YEAR_ SET 2003
MON_ SET 3
DAY_ SET 7
HOUR_ SET 8
MIN_ SET 30
CARD1_ SET 1 ;设置卡,有顺序要求,并写入EEPROM
CARD2_ SET 2 ;清零卡,有顺序要求,并写入EEPROM
CARD3_ SET 3 ;管理卡,没有顺序要求,不作记录
CARD4_ SET 4 ;校验卡,没有顺序要求,不做记录
CARD5_ SET 5 ;用户卡,有顺序要求,并写入EEPROM
CARD6_ SET 6 ;临时卡,有顺序要求,并写入EEPROM
CARD7_ SET 7 ;校表卡,没有顺序要求,不做记录
CARD8_ SET 8 ;测试卡,没有顺序要求,不做记录
CARD9_ SET 9 ;工程卡,没有顺序要求,不做记录
DSPGAP_ SET 1 ;LCD显示间隔时间常数,单位S
DSPTM_ SET 240 ;LCD显示延迟时间90秒
CHVTM_ SET 240 ;LCD显示延迟时间90秒
XT2OFF set 20h
SELM1 set 10h
SELM0 set 8
SELS set 4
//**************************** Register defination *************************//
#define AX R4 //for main
#define BX R5
#define CX R6
#define DX R7
#define EX R8
#define FX R9
#define GX R10
#define AX1 R11 //for sub program
#define BX1 R12
#define CX1 R13
#define AX2 R14 //for interrupt
#define BX2 R15
//**************************** P1 port defination *************************//
TA0 SET 1H ;00000001 P1.0 TA口
SEN1 SET 2H ;00000010 P1.1 传感器1
SEN2 SET 4H ;00000100 P1.2 传感器2
SEN3 SET 8H ;00001000 P1.3 传感器3
SenPWR SET 10H ;00010000 P1.4 传感器电压
FCLK SET 20H ;00100000 P1.5 卡的CLK输入
MotorStop SET 40H ;01000000 P1.6 捕获/比较器
VTEST SET 80H ;10000000 P1.7 电压检测
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