📄 nchal.h
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/******************************************************************************
Copyright (C) 2003, 2004, NetChip Technology, Inc. (http://www.netchip.com)
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND,
EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A PARTICULAR PURPOSE.
NCHAL.H
NetChip Hardware Abstraction Layer (HAL) for NET2272 access.
The upper edge of NcHal exposes a small set of macros to access the
NET2272. The lower edge does the actual chip accesses, and is very hardware
specific. You are invited to change the lower edge as required for your
hardware platform. Preserving the upper edge eases portability.
NcHal includes debug and high performance "direct access" versions. During
initial development NetChip recommends using the debug version. The high
performance version is well-optimized, but may require further optimizations
for specific platforms.
******************************************************************************/
///////////////////////////////////////////////////////////////////////////////
#ifndef NCHAL_H
#define NCHAL_H
///////////////////////////////////////////////////////////////////////////////
#ifndef NET2272_DIRECT_ACCESS
#pragma message ("NcHal.H: NET2272_DIRECT_ACCESS not defined!!\n")
#endif
///////////////////////////////////////////////////////////////////////////////
#ifndef NET2272_16BIT
#pragma message ("NcHal.H: NET2272_16BIT not defined!!\n")
#endif
/////////////////////////////////////////////////////////////////////
// The all-important base address of the NetChip NET2272 chip...
// - If your NET2272 is memory mapped to 0x460000 you would use:
// #define NETCHIP_BASEADDRESS ((PNETCHIP_DATA_TYPE)0x460000)
#define NETCHIP_BASEADDRESS ((PNETCHIP_DATA_TYPE)NetchipBaseAddress)
///////////////////////////////////////////////////////////////////////////////
// Useful NET2272 read/write macros
///////////////////////////////////////////////////////////////////////////////
// Number of address bits connected to NET2272
// - As few as one and as many as five address bits can be connected to the NET2272
// - Better performance is achieved using more address bits
// - Number of address bits connected cannot exceed five
#define NET2272_ADDRESS_BITS_CONNECTED 5 // 5: All five address bits connected on NetChip NET2272 PCI-RDK
///////////////////////////////////////////////////////////////////////////////
// First address where indirect access to NET2272 registers is required
// - This threshold depends on how many NET2272 address bits are being used
// - Registers at or above the threshold are accessed indirectly (using REGADDRPTR/REGDATA)
// - Registers at or above 0x20 (IRQENB0) can *only* be accessed indirectly (using REGADDRPTR/REGDATA)
#define NET2272_INDIRECT_THRESHOLD 1<<(NET2272_ADDRESS_BITS_CONNECTED)
/////////////////////////////////////////////////////////////////////
// EP_DATA register on the NET2272 can be configured as either an 8 or 16 bit wide
// register. Other registers are 8 bit:
// - NetChip RDK hardware is configured such that CPU A1 is connected
// to NET2272 A0 (. . .). (The reasons are specific to the NetChip RDK, and may not
// apply to your implementation.)
// - Specifying the odd data structures below allows automatic compile-time coherence
// for 8 or 16 bit NET2272 Bus Width selections.
// - Verify read and write register access is working properly before adding
// high-level complexity. (See NetChip's "Are You There" routine)
// - Your implementation will likely choose one bus width or the other, eliminating
// the need for this much complexity.
// - We apologize for any confusion our implementation is likely to cause
#if NET2272_16BIT
// NET2272 EP_DATA Data Width set for 16-bit mode:
// - NET2272 EP_DATA is accessed as a 16 bit register
// - All other NET2272 registers are 16-bit aligned on RDK (but only 8 bits are used)
typedef volatile unsigned short NET2272_EP_DATA, *PNET2272_EP_DATA; // EP_DATA is a 16-bit register
typedef struct _NETCHIP_DATA_TYPE
{ // With Data Width set, RDK firmware accesses NET2272 registers as an array of this structure type:
// - Adjust structure as needed for your hardware (16/32 bit)
volatile unsigned short NcReg;
//unsigned short Ignore2; // Needed for 32, removed for 16
} NETCHIP_DATA_TYPE, *PNETCHIP_DATA_TYPE;
#else
// NET2272 EP_DATA Data Width set for 8-bit mode:
// - All NET2272 registers (including EP_DATA) are 16-bit aligned on RDK (but only 8 bits are used)
typedef volatile unsigned char NET2272_EP_DATA, *PNET2272_EP_DATA; // EP_DATA is an 8-bit register
typedef struct _NETCHIP_DATA_TYPE
{ // With Data Width clear, RDK firmware accesses NET2272 registers as an array of this structure type:
// - Adjust structure as needed for your hardware (8/16/32 bit)
volatile unsigned char NcReg;
unsigned char Ignore1; // Needed for 16, removed for 8
// unsigned short Ignore2; // Needed for 32, removed for 16
} NETCHIP_DATA_TYPE, *PNETCHIP_DATA_TYPE;
#endif // NET2272_16BIT
///////////////////////////////////////////////////////////////////////////////
// Chip access option: Call or direct (memory mapped)?
// - During early development and debug, the call option is preferred
// - For best performance, apply the 'direct access' option
#if NET2272_DIRECT_ACCESS
// For a memory-mapped NET2272 this is an excellent interface:
// - Automatically applies indirect NET2272 addressing when required
// - When the register parameter is a constant, a good compiler will resolve
// these macros *very* efficiently
//
// Warning regarding interrupts and NET2272 indirect addressing (REGADDRPTR): If
// non-interrupt code is to apply NET2272 indirect addressing (i.e. code
// specifies REGADDRPTR) be sure to protect that section of code from an
// interrupt routine that might unexpectedly alter REGADDRPTR. Otherwise
// you may see very odd behavior! Workaround options include:
// - Non-interrupt code can "save, disable, and restore" the interrupt
// controller enable mechanism
// - Interrupt code can "save, use, and restore" REGADDRPTR
//
// BUGBUG: (MSVC bug?) When compiled with MSVC, these macros resolve incorrectly if:
// - Two or more macros are combined in one statement AND
// - The 'reg' parameter exceeds NET2272_INDIRECT_THRESHOLD (ternary evaluates to TRUE) AND
// - The 'reg' parameter is not identical (in every macro invocation in the statement)
// Avoid forms such as: UINT Foo = NETCHIP_READ(X) + NETCHIP_READ(X+1);
#define NETCHIP_WRITE(reg, val) \
(((reg) >= NET2272_INDIRECT_THRESHOLD)? ((NETCHIP_BASEADDRESS[REGADDRPTR].NcReg) = (reg)), \
((NETCHIP_BASEADDRESS[REGDATA].NcReg) = (BYTE)(val)) : \
((NETCHIP_BASEADDRESS[(reg)].NcReg) = (BYTE)(val)))
#define NETCHIP_READ(reg) \
(BYTE)((((reg) >= NET2272_INDIRECT_THRESHOLD) ? ((NETCHIP_BASEADDRESS[REGADDRPTR].NcReg) = (reg)), \
((BYTE)NETCHIP_BASEADDRESS[REGDATA].NcReg) : \
((BYTE)NETCHIP_BASEADDRESS[(reg)].NcReg)))
#else
// Use a 'call' interface for device I/O
// - Often convenient during early development and debug
#define NETCHIP_WRITE(reg, val) NcWrite8(reg, (BYTE)(val))
#define NETCHIP_READ(reg) NcRead8(reg)
///////////////////////////////////////////////////////////////////////////////
void
NcWrite8(
UINT reg,
BYTE val
);
///////////////////////////////////////////////////////////////////////////////
volatile BYTE
NcRead8(
UINT reg
);
///////////////////////////////////////////////////////////////////////////////
#endif // USING_MEMORY_MAPPED_IO
///////////////////////////////////////////////////////////////////////////////
// NET2272 register names
// - Array of NET2272 names (ascii-text)
// - Often useful during early development and debug
// - For convenience, address-to-name layed out in one-to-one correspondence
#if _NCDEBUG
extern char *Net2272_RegisterNames[];
#endif
///////////////////////////////////////////////////////////////////////////////
#endif // NCHAL_H
///////////////////////////////////////////////////////////////////////////////
// End of file
///////////////////////////////////////////////////////////////////////////////
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