vhdl.vhd

Cadence_Starter_Library

-- generated by newgenasym Thu Oct 30 14:40:37 2008

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity lt3080 is
    port (    
	\in\:      IN     STD_LOGIC;    
	OUT1:      OUT    STD_LOGIC;    
	OUT2:      OUT    STD_LOGIC;    
	SET:       IN     STD_LOGIC);
end lt3080;