vhdl.vhd

来自「Cadence_Starter_Library」· VHDL 代码 · 共 15 行

-- generated by newgenasym Tue Oct 21 18:57:15 2008

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity nvregg79x is
    port (    
	GND:       IN     STD_LOGIC;    
	\in\:      IN     STD_LOGIC;    
	IN1:       IN     STD_LOGIC;    
	IN2:       IN     STD_LOGIC;    
	IN3:       IN     STD_LOGIC;    
	\out\:     OUT    STD_LOGIC);
end nvregg79x;