vhdl.vhd

Cadence_Starter_Library

-- generated by newgenasym Thu Oct 30 21:46:29 2008

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity ltc3713 is
    port (    
	BG:        INOUT  STD_LOGIC;    
	BOOST:     INOUT  STD_LOGIC;    
	FCB:       IN     STD_LOGIC;    
	INTVCC:    OUT    STD_LOGIC;    
	ION:       IN     STD_LOGIC;    
	ITH:       INOUT  STD_LOGIC;    
	PGND1:     IN     STD_LOGIC;    
	PGND2:     IN     STD_LOGIC;    
	PGOOD:     OUT    STD_LOGIC;    
	\run/ss\:  IN     STD_LOGIC;    
	\sense+\:  IN     STD_LOGIC;    
	\sense-\:  IN     STD_LOGIC;    
	SGND1:     IN     STD_LOGIC;    
	SGND2:     IN     STD_LOGIC;    
	SHDN_N:    INOUT  STD_LOGIC;    
	SW1:       INOUT  STD_LOGIC;    
	SW2:       INOUT  STD_LOGIC;    
	TG:        INOUT  STD_LOGIC;    
	VFB1:      IN     STD_LOGIC;    
	VFB2:      INOUT  STD_LOGIC;    
	VIN1:      IN     STD_LOGIC;    
	VIN2:      IN     STD_LOGIC;    
	VON:       IN     STD_LOGIC;    
	VRING:     IN     STD_LOGIC);
end ltc3713;