vhdl.vhd

Cadence_Starter_Library

-- generated by newgenasym Tue Oct 21 18:34:25 2008

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity lm317 is
    port (    
	ADJ:       IN     STD_LOGIC;    
	\in\:      IN     STD_LOGIC;    
	\out\:     IN     STD_LOGIC);
end lm317;