vhdl.vhd

Cadence_Starter_Library

-- generated by newgenasym Wed Oct 22 14:13:23 2008

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity tlc5602 is
    port (    
	AGND:      IN     STD_LOGIC;    
	AOUT:      OUT    STD_LOGIC;    
	AVDD1:     IN     STD_LOGIC;    
	AVDD2:     IN     STD_LOGIC;    
	CLK:       IN     STD_LOGIC;    
	COMP:      IN     STD_LOGIC;    
	D0:        IN     STD_LOGIC;    
	D1:        IN     STD_LOGIC;    
	D2:        IN     STD_LOGIC;    
	D3:        IN     STD_LOGIC;    
	D4:        IN     STD_LOGIC;    
	D5:        IN     STD_LOGIC;    
	D6:        IN     STD_LOGIC;    
	D7:        IN     STD_LOGIC;    
	DGND:      IN     STD_LOGIC;    
	DVDD1:     IN     STD_LOGIC;    
	DVDD2:     IN     STD_LOGIC;    
	REF:       IN     STD_LOGIC);
end tlc5602;