vhdl.vhd

来自「Cadence_Starter_Library」· VHDL 代码 · 共 12 行

-- generated by newgenasym Tue Oct 28 09:37:56 2008

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity respoti is
    port (    
	A:         INOUT  STD_LOGIC;    
	B:         INOUT  STD_LOGIC;    
	T:         INOUT  STD_LOGIC);
end respoti;