vhdl.vhd

来自「Cadence_Starter_Library」· VHDL 代码 · 共 12 行

-- generated by newgenasym Thu Oct 23 15:10:38 2008

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity trnchan is
    port (    
	D:         INOUT  STD_LOGIC;    
	G:         INOUT  STD_LOGIC;    
	S:         INOUT  STD_LOGIC);
end trnchan;