📄 des.tan.qmsg
字号:
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk " "Info: Assuming node \"clk\" is an undefined clock" { } { { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 4 -1 0 } } { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } } } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0} } { } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register shvar\[1\] register dreg\[37\] 58.7 MHz 17.037 ns Internal " "Info: Clock \"clk\" has Internal fmax of 58.7 MHz between source register \"shvar\[1\]\" and destination register \"dreg\[37\]\" (period= 17.037 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "16.761 ns + Longest register register " "Info: + Longest register to register delay is 16.761 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns shvar\[1\] 1 REG LCFF_X25_Y17_N19 62 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X25_Y17_N19; Fanout = 62; REG Node = 'shvar\[1\]'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "" { shvar[1] } "NODE_NAME" } "" } } { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 73 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.699 ns) + CELL(0.616 ns) 2.315 ns oneblock1:inst\|keyout\[28\]~4019 2 COMB LCCOMB_X25_Y17_N0 44 " "Info: 2: + IC(1.699 ns) + CELL(0.616 ns) = 2.315 ns; Loc. = LCCOMB_X25_Y17_N0; Fanout = 44; COMB Node = 'oneblock1:inst\|keyout\[28\]~4019'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "2.315 ns" { shvar[1] oneblock1:inst|keyout[28]~4019 } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.946 ns) + CELL(0.624 ns) 4.885 ns oneblock1:inst\|keyout\[7\]~4211 3 COMB LCCOMB_X25_Y17_N28 1 " "Info: 3: + IC(1.946 ns) + CELL(0.624 ns) = 4.885 ns; Loc. = LCCOMB_X25_Y17_N28; Fanout = 1; COMB Node = 'oneblock1:inst\|keyout\[7\]~4211'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "2.570 ns" { oneblock1:inst|keyout[28]~4019 oneblock1:inst|keyout[7]~4211 } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.374 ns) + CELL(0.623 ns) 5.882 ns oneblock1:inst\|keyout\[7\]~4212 4 COMB LCCOMB_X25_Y17_N2 1 " "Info: 4: + IC(0.374 ns) + CELL(0.623 ns) = 5.882 ns; Loc. = LCCOMB_X25_Y17_N2; Fanout = 1; COMB Node = 'oneblock1:inst\|keyout\[7\]~4212'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "0.997 ns" { oneblock1:inst|keyout[7]~4211 oneblock1:inst|keyout[7]~4212 } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.384 ns) + CELL(0.206 ns) 6.472 ns oneblock1:inst\|keyout\[7\]~4213 5 COMB LCCOMB_X25_Y17_N16 2 " "Info: 5: + IC(0.384 ns) + CELL(0.206 ns) = 6.472 ns; Loc. = LCCOMB_X25_Y17_N16; Fanout = 2; COMB Node = 'oneblock1:inst\|keyout\[7\]~4213'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "0.590 ns" { oneblock1:inst|keyout[7]~4212 oneblock1:inst|keyout[7]~4213 } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.373 ns) + CELL(0.370 ns) 7.215 ns oneblock1:inst\|ed2\[17\] 6 COMB LCCOMB_X25_Y17_N20 12 " "Info: 6: + IC(0.373 ns) + CELL(0.370 ns) = 7.215 ns; Loc. = LCCOMB_X25_Y17_N20; Fanout = 12; COMB Node = 'oneblock1:inst\|ed2\[17\]'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "0.743 ns" { oneblock1:inst|keyout[7]~4213 oneblock1:inst|ed2[17] } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 12 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.607 ns) + CELL(0.624 ns) 11.446 ns oneblock1:inst\|dout~1236 7 COMB LCCOMB_X29_Y16_N26 2 " "Info: 7: + IC(3.607 ns) + CELL(0.624 ns) = 11.446 ns; Loc. = LCCOMB_X29_Y16_N26; Fanout = 2; COMB Node = 'oneblock1:inst\|dout~1236'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "4.231 ns" { oneblock1:inst|ed2[17] oneblock1:inst|dout~1236 } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 6 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.454 ns) + CELL(0.370 ns) 13.270 ns oneblock1:inst\|dout~1203 8 COMB LCCOMB_X26_Y14_N4 1 " "Info: 8: + IC(1.454 ns) + CELL(0.370 ns) = 13.270 ns; Loc. = LCCOMB_X26_Y14_N4; Fanout = 1; COMB Node = 'oneblock1:inst\|dout~1203'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "1.824 ns" { oneblock1:inst|dout~1236 oneblock1:inst|dout~1203 } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 6 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.293 ns) + CELL(0.647 ns) 15.210 ns oneblock1:inst\|dout~1204 9 COMB LCCOMB_X25_Y18_N12 2 " "Info: 9: + IC(1.293 ns) + CELL(0.647 ns) = 15.210 ns; Loc. = LCCOMB_X25_Y18_N12; Fanout = 2; COMB Node = 'oneblock1:inst\|dout~1204'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "1.940 ns" { oneblock1:inst|dout~1203 oneblock1:inst|dout~1204 } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 6 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.091 ns) + CELL(0.460 ns) 16.761 ns dreg\[37\] 10 REG LCFF_X27_Y18_N13 4 " "Info: 10: + IC(1.091 ns) + CELL(0.460 ns) = 16.761 ns; Loc. = LCFF_X27_Y18_N13; Fanout = 4; REG Node = 'dreg\[37\]'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "1.551 ns" { oneblock1:inst|dout~1204 dreg[37] } "NODE_NAME" } "" } } { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 33 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.540 ns ( 27.09 % ) " "Info: Total cell delay = 4.540 ns ( 27.09 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "12.221 ns ( 72.91 % ) " "Info: Total interconnect delay = 12.221 ns ( 72.91 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "16.761 ns" { shvar[1] oneblock1:inst|keyout[28]~4019 oneblock1:inst|keyout[7]~4211 oneblock1:inst|keyout[7]~4212 oneblock1:inst|keyout[7]~4213 oneblock1:inst|ed2[17] oneblock1:inst|dout~1236 oneblock1:inst|dout~1203 oneblock1:inst|dout~1204 dreg[37] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "16.761 ns" { shvar[1] oneblock1:inst|keyout[28]~4019 oneblock1:inst|keyout[7]~4211 oneblock1:inst|keyout[7]~4212 oneblock1:inst|keyout[7]~4213 oneblock1:inst|ed2[17] oneblock1:inst|dout~1236 oneblock1:inst|dout~1203 oneblock1:inst|dout~1204 dreg[37] } { 0.000ns 1.699ns 1.946ns 0.374ns 0.384ns 0.373ns 3.607ns 1.454ns 1.293ns 1.091ns } { 0.000ns 0.616ns 0.624ns 0.623ns 0.206ns 0.370ns 0.624ns 0.370ns 0.647ns 0.460ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.012 ns - Smallest " "Info: - Smallest clock skew is -0.012 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.964 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 2.964 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns clk 1 CLK PIN_M1 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_M1; Fanout = 1; CLK Node = 'clk'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "" { clk } "NODE_NAME" } "" } } { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 4 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.239 ns clk~clkctrl 2 COMB CLKCTRL_G3 141 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.239 ns; Loc. = CLKCTRL_G3; Fanout = 141; COMB Node = 'clk~clkctrl'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "0.139 ns" { clk clk~clkctrl } "NODE_NAME" } "" } } { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 4 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.059 ns) + CELL(0.666 ns) 2.964 ns dreg\[37\] 3 REG LCFF_X27_Y18_N13 4 " "Info: 3: + IC(1.059 ns) + CELL(0.666 ns) = 2.964 ns; Loc. = LCFF_X27_Y18_N13; Fanout = 4; REG Node = 'dreg\[37\]'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "1.725 ns" { clk~clkctrl dreg[37] } "NODE_NAME" } "" } } { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 33 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.766 ns ( 59.58 % ) " "Info: Total cell delay = 1.766 ns ( 59.58 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.198 ns ( 40.42 % ) " "Info: Total interconnect delay = 1.198 ns ( 40.42 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "2.964 ns" { clk clk~clkctrl dreg[37] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "2.964 ns" { clk clk~combout clk~clkctrl dreg[37] } { 0.000ns 0.000ns 0.139ns 1.059ns } { 0.000ns 1.100ns 0.000ns 0.666ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.976 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 2.976 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns clk 1 CLK PIN_M1 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_M1; Fanout = 1; CLK Node = 'clk'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "" { clk } "NODE_NAME" } "" } } { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 4 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.239 ns clk~clkctrl 2 COMB CLKCTRL_G3 141 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.239 ns; Loc. = CLKCTRL_G3; Fanout = 141; COMB Node = 'clk~clkctrl'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "0.139 ns" { clk clk~clkctrl } "NODE_NAME" } "" } } { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 4 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.071 ns) + CELL(0.666 ns) 2.976 ns shvar\[1\] 3 REG LCFF_X25_Y17_N19 62 " "Info: 3: + IC(1.071 ns) + CELL(0.666 ns) = 2.976 ns; Loc. = LCFF_X25_Y17_N19; Fanout = 62; REG Node = 'shvar\[1\]'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "1.737 ns" { clk~clkctrl shvar[1] } "NODE_NAME" } "" } } { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 73 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.766 ns ( 59.34 % ) " "Info: Total cell delay = 1.766 ns ( 59.34 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.210 ns ( 40.66 % ) " "Info: Total interconnect delay = 1.210 ns ( 40.66 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "2.976 ns" { clk clk~clkctrl shvar[1] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "2.976 ns" { clk clk~combout clk~clkctrl shvar[1] } { 0.000ns 0.000ns 0.139ns 1.071ns } { 0.000ns 1.100ns 0.000ns 0.666ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "2.964 ns" { clk clk~clkctrl dreg[37] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "2.964 ns" { clk clk~combout clk~clkctrl dreg[37] } { 0.000ns 0.000ns 0.139ns 1.059ns } { 0.000ns 1.100ns 0.000ns 0.666ns } } } { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "2.976 ns" { clk clk~clkctrl shvar[1] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "2.976 ns" { clk clk~combout clk~clkctrl shvar[1] } { 0.000ns 0.000ns 0.139ns 1.071ns } { 0.000ns 1.100ns 0.000ns 0.666ns } } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" { } { { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 73 -1 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" { } { { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 33 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "16.761 ns" { shvar[1] oneblock1:inst|keyout[28]~4019 oneblock1:inst|keyout[7]~4211 oneblock1:inst|keyout[7]~4212 oneblock1:inst|keyout[7]~4213 oneblock1:inst|ed2[17] oneblock1:inst|dout~1236 oneblock1:inst|dout~1203 oneblock1:inst|dout~1204 dreg[37] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "16.761 ns" { shvar[1] oneblock1:inst|keyout[28]~4019 oneblock1:inst|keyout[7]~4211 oneblock1:inst|keyout[7]~4212 oneblock1:inst|keyout[7]~4213 oneblock1:inst|ed2[17] oneblock1:inst|dout~1236 oneblock1:inst|dout~1203 oneblock1:inst|dout~1204 dreg[37] } { 0.000ns 1.699ns 1.946ns 0.374ns 0.384ns 0.373ns 3.607ns 1.454ns 1.293ns 1.091ns } { 0.000ns 0.616ns 0.624ns 0.623ns 0.206ns 0.370ns 0.624ns 0.370ns 0.647ns 0.460ns } } } { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "2.964 ns" { clk clk~clkctrl dreg[37] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "2.964 ns" { clk clk~combout clk~clkctrl dreg[37] } { 0.000ns 0.000ns 0.139ns 1.059ns } { 0.000ns 1.100ns 0.000ns 0.666ns } } } { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "2.976 ns" { clk clk~clkctrl shvar[1] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "2.976 ns" { clk clk~combout clk~clkctrl shvar[1] } { 0.000ns 0.000ns 0.139ns 1.071ns } { 0.000ns 1.100ns 0.000ns 0.666ns } } } } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_TSU_RESULT" "dreg\[37\] mode clk 20.380 ns register " "Info: tsu for register \"dreg\[37\]\" (data pin = \"mode\", clock pin = \"clk\") is 20.380 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "23.384 ns + Longest pin register " "Info: + Longest pin to register delay is 23.384 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.914 ns) 0.914 ns mode 1 PIN PIN_C13 65 " "Info: 1: + IC(0.000 ns) + CELL(0.914 ns) = 0.914 ns; Loc. = PIN_C13; Fanout = 65; PIN Node = 'mode'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "" { mode } "NODE_NAME" } "" } } { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 6 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(7.409 ns) + CELL(0.615 ns) 8.938 ns oneblock1:inst\|keyout\[28\]~4019 2 COMB LCCOMB_X25_Y17_N0 44 " "Info: 2: + IC(7.409 ns) + CELL(0.615 ns) = 8.938 ns; Loc. = LCCOMB_X25_Y17_N0; Fanout = 44; COMB Node = 'oneblock1:inst\|keyout\[28\]~4019'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "8.024 ns" { mode oneblock1:inst|keyout[28]~4019 } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.946 ns) + CELL(0.624 ns) 11.508 ns oneblock1:inst\|keyout\[7\]~4211 3 COMB LCCOMB_X25_Y17_N28 1 " "Info: 3: + IC(1.946 ns) + CELL(0.624 ns) = 11.508 ns; Loc. = LCCOMB_X25_Y17_N28; Fanout = 1; COMB Node = 'oneblock1:inst\|keyout\[7\]~4211'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "2.570 ns" { oneblock1:inst|keyout[28]~4019 oneblock1:inst|keyout[7]~4211 } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.374 ns) + CELL(0.623 ns) 12.505 ns oneblock1:inst\|keyout\[7\]~4212 4 COMB LCCOMB_X25_Y17_N2 1 " "Info: 4: + IC(0.374 ns) + CELL(0.623 ns) = 12.505 ns; Loc. = LCCOMB_X25_Y17_N2; Fanout = 1; COMB Node = 'oneblock1:inst\|keyout\[7\]~4212'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "0.997 ns" { oneblock1:inst|keyout[7]~4211 oneblock1:inst|keyout[7]~4212 } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.384 ns) + CELL(0.206 ns) 13.095 ns oneblock1:inst\|keyout\[7\]~4213 5 COMB LCCOMB_X25_Y17_N16 2 " "Info: 5: + IC(0.384 ns) + CELL(0.206 ns) = 13.095 ns; Loc. = LCCOMB_X25_Y17_N16; Fanout = 2; COMB Node = 'oneblock1:inst\|keyout\[7\]~4213'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "0.590 ns" { oneblock1:inst|keyout[7]~4212 oneblock1:inst|keyout[7]~4213 } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.373 ns) + CELL(0.370 ns) 13.838 ns oneblock1:inst\|ed2\[17\] 6 COMB LCCOMB_X25_Y17_N20 12 " "Info: 6: + IC(0.373 ns) + CELL(0.370 ns) = 13.838 ns; Loc. = LCCOMB_X25_Y17_N20; Fanout = 12; COMB Node = 'oneblock1:inst\|ed2\[17\]'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "0.743 ns" { oneblock1:inst|keyout[7]~4213 oneblock1:inst|ed2[17] } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 12 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.607 ns) + CELL(0.624 ns) 18.069 ns oneblock1:inst\|dout~1236 7 COMB LCCOMB_X29_Y16_N26 2 " "Info: 7: + IC(3.607 ns) + CELL(0.624 ns) = 18.069 ns; Loc. = LCCOMB_X29_Y16_N26; Fanout = 2; COMB Node = 'oneblock1:inst\|dout~1236'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "4.231 ns" { oneblock1:inst|ed2[17] oneblock1:inst|dout~1236 } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 6 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.454 ns) + CELL(0.370 ns) 19.893 ns oneblock1:inst\|dout~1203 8 COMB LCCOMB_X26_Y14_N4 1 " "Info: 8: + IC(1.454 ns) + CELL(0.370 ns) = 19.893 ns; Loc. = LCCOMB_X26_Y14_N4; Fanout = 1; COMB Node = 'oneblock1:inst\|dout~1203'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "1.824 ns" { oneblock1:inst|dout~1236 oneblock1:inst|dout~1203 } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 6 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.293 ns) + CELL(0.647 ns) 21.833 ns oneblock1:inst\|dout~1204 9 COMB LCCOMB_X25_Y18_N12 2 " "Info: 9: + IC(1.293 ns) + CELL(0.647 ns) = 21.833 ns; Loc. = LCCOMB_X25_Y18_N12; Fanout = 2; COMB Node = 'oneblock1:inst\|dout~1204'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "1.940 ns" { oneblock1:inst|dout~1203 oneblock1:inst|dout~1204 } "NODE_NAME" } "" } } { "oneblock1.v" "" { Text "F:/altera/quartus51/mydesign/oneblock1.v" 6 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.091 ns) + CELL(0.460 ns) 23.384 ns dreg\[37\] 10 REG LCFF_X27_Y18_N13 4 " "Info: 10: + IC(1.091 ns) + CELL(0.460 ns) = 23.384 ns; Loc. = LCFF_X27_Y18_N13; Fanout = 4; REG Node = 'dreg\[37\]'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "1.551 ns" { oneblock1:inst|dout~1204 dreg[37] } "NODE_NAME" } "" } } { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 33 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.453 ns ( 23.32 % ) " "Info: Total cell delay = 5.453 ns ( 23.32 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "17.931 ns ( 76.68 % ) " "Info: Total interconnect delay = 17.931 ns ( 76.68 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "23.384 ns" { mode oneblock1:inst|keyout[28]~4019 oneblock1:inst|keyout[7]~4211 oneblock1:inst|keyout[7]~4212 oneblock1:inst|keyout[7]~4213 oneblock1:inst|ed2[17] oneblock1:inst|dout~1236 oneblock1:inst|dout~1203 oneblock1:inst|dout~1204 dreg[37] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "23.384 ns" { mode mode~combout oneblock1:inst|keyout[28]~4019 oneblock1:inst|keyout[7]~4211 oneblock1:inst|keyout[7]~4212 oneblock1:inst|keyout[7]~4213 oneblock1:inst|ed2[17] oneblock1:inst|dout~1236 oneblock1:inst|dout~1203 oneblock1:inst|dout~1204 dreg[37] } { 0.000ns 0.000ns 7.409ns 1.946ns 0.374ns 0.384ns 0.373ns 3.607ns 1.454ns 1.293ns 1.091ns } { 0.000ns 0.914ns 0.615ns 0.624ns 0.623ns 0.206ns 0.370ns 0.624ns 0.370ns 0.647ns 0.460ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" { } { { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 33 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.964 ns - Shortest register " "Info: - Shortest clock path from clock \"clk\" to destination register is 2.964 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns clk 1 CLK PIN_M1 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_M1; Fanout = 1; CLK Node = 'clk'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "" { clk } "NODE_NAME" } "" } } { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 4 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.239 ns clk~clkctrl 2 COMB CLKCTRL_G3 141 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.239 ns; Loc. = CLKCTRL_G3; Fanout = 141; COMB Node = 'clk~clkctrl'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "0.139 ns" { clk clk~clkctrl } "NODE_NAME" } "" } } { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 4 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.059 ns) + CELL(0.666 ns) 2.964 ns dreg\[37\] 3 REG LCFF_X27_Y18_N13 4 " "Info: 3: + IC(1.059 ns) + CELL(0.666 ns) = 2.964 ns; Loc. = LCFF_X27_Y18_N13; Fanout = 4; REG Node = 'dreg\[37\]'" { } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "1.725 ns" { clk~clkctrl dreg[37] } "NODE_NAME" } "" } } { "DES.v" "" { Text "F:/altera/quartus51/mydesign/DES.v" 33 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.766 ns ( 59.58 % ) " "Info: Total cell delay = 1.766 ns ( 59.58 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.198 ns ( 40.42 % ) " "Info: Total interconnect delay = 1.198 ns ( 40.42 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "2.964 ns" { clk clk~clkctrl dreg[37] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "2.964 ns" { clk clk~combout clk~clkctrl dreg[37] } { 0.000ns 0.000ns 0.139ns 1.059ns } { 0.000ns 1.100ns 0.000ns 0.666ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "23.384 ns" { mode oneblock1:inst|keyout[28]~4019 oneblock1:inst|keyout[7]~4211 oneblock1:inst|keyout[7]~4212 oneblock1:inst|keyout[7]~4213 oneblock1:inst|ed2[17] oneblock1:inst|dout~1236 oneblock1:inst|dout~1203 oneblock1:inst|dout~1204 dreg[37] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "23.384 ns" { mode mode~combout oneblock1:inst|keyout[28]~4019 oneblock1:inst|keyout[7]~4211 oneblock1:inst|keyout[7]~4212 oneblock1:inst|keyout[7]~4213 oneblock1:inst|ed2[17] oneblock1:inst|dout~1236 oneblock1:inst|dout~1203 oneblock1:inst|dout~1204 dreg[37] } { 0.000ns 0.000ns 7.409ns 1.946ns 0.374ns 0.384ns 0.373ns 3.607ns 1.454ns 1.293ns 1.091ns } { 0.000ns 0.914ns 0.615ns 0.624ns 0.623ns 0.206ns 0.370ns 0.624ns 0.370ns 0.647ns 0.460ns } } } { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DES" "UNKNOWN" "V1" "F:/altera/quartus51/mydesign/db/DES.quartus_db" { Floorplan "F:/altera/quartus51/mydesign/" "" "2.964 ns" { clk clk~clkctrl dreg[37] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "2.964 ns" { clk clk~combout clk~clkctrl dreg[37] } { 0.000ns 0.000ns 0.139ns 1.059ns } { 0.000ns 1.100ns 0.000ns 0.666ns } } } } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}
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