lcd_sw.h

手机S6B33BG_LCM___lcd driver

/*****************************************************************************
*  Copyright Statement:
*  --------------------
*  This software is protected by Copyright and the information contained
*  herein is confidential. The software may not be copied and the information
*  contained herein may not be used or disclosed except with the written
*  permission of MediaTek Inc. (C) 2001
*
*****************************************************************************/

/*****************************************************************************
 *
 * Filename:
 * ---------
 *    lcd_sw.h
 *
 * Project:
 * --------
 *   Maui_Software
 *
 * Description:
 * ------------
 *   This file is intends for LCD driver.
 *
 * Author:
 * -------
 * -------
 *
 *============================================================================
 *             HISTORY
 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *------------------------------------------------------------------------------
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 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *============================================================================
 ****************************************************************************/
#include "lcd_if.h"
#ifndef _LCD_SW_H
#define _LCD_SW_H

#define SSD1779_8BIT

#if ( defined(MT6205B) )
	//#define LCD_DMAENABLE
   #define LCD_DUMMYADDR   0x80170010
	#ifdef ORDNANCE
		#define LCD_CTRLAddr		0x20000000
		#define LCD_DATAAddr		0x2fffffff
	#else	/*!ORDNANCE*/
		#define LCD_CTRLAddr		0x30000000
		#define LCD_DATAAddr		0x3FFFFFFF
		#define SUBLCD_CTRLAddr       0x3F7FFFFF
		#define SUBLCD_DATAAddr	0x3FFFFFFF
	#endif	/*!ORDNANCE*/
#endif	/* MT6208, FPGA, MT6205B */

/* EPSON SSD1779 ***********************************************************/
/* 128x128(65K), Paralel i/o, COG Type                     l               */
/***************************************************************************/
   #if ((defined(MT6208)) || (defined(MT6218)) ||(defined(MT6205B)))
	#ifdef MCU_13M
      	  #define LCD_delay_SSD1779()      	
        #endif   /*MCU_13M*/

   #ifdef MCU_26M
    	#define LCD_delay_SSD1779() \
 	{\
	         kal_uint16  _stat;\
 	 _stat = *(volatile kal_uint16  *)LCD_DUMMYADDR;\
 	 _stat = *(volatile kal_uint16  *)LCD_DUMMYADDR;\
 	 _stat = *(volatile kal_uint16  *)LCD_DUMMYADDR;\
 	 }
   #endif   /*MCU_26M*/

   #ifdef MCU_39M
 	#define LCD_delay_SSD1779() \
    	{\
       		kal_uint16  _stat;\
       		_stat = *(volatile kal_uint16  *)LCD_DUMMYADDR;\
       		_stat = *(volatile kal_uint16  *)LCD_DUMMYADDR;\
 	}
   #endif   /*MCU_39M*/

   #ifdef MCU_52M
 		#define LCD_delay_SSD1779() \
      		{\
         		kal_uint16  _stat;\
         		_stat = *(volatile kal_uint16  *)LCD_DUMMYADDR;\
         		_stat = *(volatile kal_uint16  *)LCD_DUMMYADDR;\
         		_stat = *(volatile kal_uint16  *)LCD_DUMMYADDR;\
         		_stat = *(volatile kal_uint16  *)LCD_DUMMYADDR;\
      		}
   #endif   /*MCU_52M*/
#endif   /*MT6208*/

#if (defined(MT6205B) || defined(MT6218))

		#define LCD_CtrlWrite_SSD1779(_data)  \
		{\
			*(volatile kal_uint8 *)LCD_CTRLAddr = _data;\
  			LCD_delay_SSD1779();\
		}

		#define LCD_DataWrite_SSD1779(_data)  \
		{\
			*(volatile kal_uint8 *)LCD_DATAAddr = _data;\
			LCD_delay_SSD1779();\
		}

               #if (defined(SSD1779_8BIT))
		    #define LCD_RAMWrite_SSD1779(_data)  \
		    {\
    			*(volatile kal_uint8 *)LCD_DATAAddr = (kal_uint8) ((_data&0xFF00)>>8);\
	    		*(volatile kal_uint8 *)LCD_DATAAddr = (kal_uint8) (_data&0xFF);\
		    	LCD_delay_SSD1779();\
		    }	
		    #define _LCD_RAMWrite_SSD1779(_data)  \
		    {\
    			*(volatile kal_uint8 *)LCD_DATAAddr = (kal_uint8) (_data&0xFF);\
    			*(volatile kal_uint8 *)LCD_DATAAddr = (kal_uint8) ((_data&0xFF00)>>8);\
		    	LCD_delay_SSD1779();\
		    }	
	         #else
		    #define LCD_RAMWrite_SSD1779(_data)  \
		{\
    			*(volatile kal_uint16  *)LCD_DATAAddr = _data;\
		    	LCD_delay_SSD1779();\
		}
#endif
#endif /* (MT6205B, MT6218), (MT6218B,MT6219) */

/* SAMSUNG UC1602 *********************************************************/
/* 96x64 (Mono), Serial i/o, COG Type                                      */
/***************************************************************************/

#if ( (defined(MT6205B)) || (defined(MT6218)) )
   
   #define LCD_CtrlWrite_UC1602(_data)\
   {\
      while(!(DRV_Reg(LCD_SSTA) & LCD_SSTA_EMP0));\
      DRV_WriteReg(LCD_DATACS0_A0LOW,_data);\
   }
   
   #define LCD_DataWrite_UC1602(_data)\
   {\
      while(!(DRV_Reg(LCD_SSTA) & LCD_SSTA_EMP0));\
      DRV_WriteReg(LCD_DATACS0_A0HIGH,_data);\
   }
   
   #define LCD_CtrlWrite1_UC1602(_data)\
   {\
      while(!(DRV_Reg(LCD_SSTA) & LCD_SSTA_EMP1));\
      DRV_WriteReg(LCD_DATACS1_A0LOW,_data);\
   }

   #define LCD_DataWrite1_UC1602(_data)\
   {\
      while(!(DRV_Reg(LCD_SSTA) & LCD_SSTA_EMP1));\
      DRV_WriteReg(LCD_DATACS1_A0HIGH,_data);\
   }

   #define LCD_ReadData_UC1602(_data)	NULL
   
#endif	/* MT6205B,MT6218 */

extern void Blockwrite_main_lcd(kal_uint16 startx,kal_uint16 starty,kal_uint16 endx,kal_uint16 endy,kal_uint16* osd);
extern void LCD_Set_X_Addr_SSD1779(kal_uint16 start_column, kal_uint16 end_column);
extern void LCD_Set_Y_Addr_SSD1779(kal_uint16 start_column, kal_uint16 end_column);
#endif   /*_LCD_SW_H*/