main.lst

kei carm lpc2103 例子 好东西

ARM COMPILER V2.51a,  main                                                                 02/11/06  15:56:46  PAGE 1   


ARM COMPILER V2.51a, COMPILATION OF MODULE main
OBJECT MODULE PLACED IN main.OBJ
COMPILER INVOKED BY: C:\Keil\ARM\BIN\CA.exe main.c THUMB BROWSE DEBUG TABS(4) 

stmt  level    source

    1          #include <LPC21xx.H>
    2          
    3          
    4          void SPI_ISR (void) __irq;
    5          
    6          void main (void)
    7          {
    8   1      unsigned int result;
    9   1      
   10   1      PINSEL0         =   0x00005500;         //enable SPI0 pins
   11   1      
   12   1      S0SPCCR         =   0x000000C8;         //Set bit timing
   13   1      S0SPCR          =   0x000000A0;         //Master interrupts enabled
   14   1      
   15   1      
   16   1      VICVectCntl0        =   0x0000002A;             //select a priority slot for a given interrupt
   17   1      VICVectAddr0        =   (unsigned)SPI_ISR;      //pass the address of the IRQ into the VIC slot
   18   1      VICIntEnable        =   0x00000400;         //enable interrupt
   19   1      
   20   1      
   21   1      result          =   S0SPSR;             //clear the status register prior to transmission
   22   1      S0SPDR          =   0x00000055;         //write some data
   23   1      
   24   1      
   25   1      while (1)
   26   1      {
   27   2      ;
   28   2      }
   29   1      
   30   1      }
   31          
   32          
   33          void SPI_ISR (void) __irq
   34          {
   35   1      unsigned int result;
   36   1      
   37   1      result = S0SPSR;            //read and clear the status flags
   38   1      
   39   1      }
ARM COMPILER V2.51a,  main                                                                 02/11/06  15:56:46  PAGE 2   

ASSEMBLY LISTING OF GENERATED OBJECT CODE



*** EXTERNALS:
 EXTERN NUMBER (__startup)



*** PUBLICS:
 PUBLIC         SPI_ISR?A
 PUBLIC         main



*** CODE SEGMENT '?PR?main?main':
    6: void main (void)
 00000000  B500      PUSH        {LR}
    7: {
 00000002            ; SCOPE-START
   10: PINSEL0         =   0x00005500;         //enable SPI0 pins
 00000002  4800      LDR         R1,=0x5500
 00000004  4800      LDR         R0,=0xE002C000
 00000006  6001      STR         R1,[R0,#0x0]
   12: S0SPCCR            =   0x000000C8;         //Set bit timing
 00000008  21C8      MOV         R1,#0xC8
 0000000A  4800      LDR         R0,=0xE002000C
 0000000C  7001      STRB        R1,[R0,#0x0]
   13: S0SPCR          =   0x000000A0;         //Master interrupts enabled
 0000000E  21A0      MOV         R1,#0xA0
 00000010  4800      LDR         R0,=0xE0020000
 00000012  7001      STRB        R1,[R0,#0x0]
   16: VICVectCntl0        =   0x0000002A;             //select a priority slot for a given interrupt
 00000014  212A      MOV         R1,#0x2A
 00000016  4800      LDR         R0,=0xFFFFF200
 00000018  6001      STR         R1,[R0,#0x0]
   17: VICVectAddr0        =   (unsigned)SPI_ISR;      //pass the address of the IRQ into the VIC slot
 0000001A  4900      LDR         R1,=SPI_ISR?A ; SPI_ISR?A
 0000001C  4800      LDR         R0,=0xFFFFF100
 0000001E  6001      STR         R1,[R0,#0x0]
   18: VICIntEnable        =   0x00000400;         //enable interrupt
 00000020  4800      LDR         R1,=0x400
 00000022  4800      LDR         R0,=0xFFFFF010
 00000024  6001      STR         R1,[R0,#0x0]
   21: result            =   S0SPSR;             //clear the status register prior to transmission
 00000026  4800      LDR         R0,=0xE0020004
 00000028  7800      LDRB        R0,[R0,#0x0]
   22: S0SPDR            =   0x00000055;         //write some data
 0000002A  2155      MOV         R1,#0x55
 0000002C  4800      LDR         R0,=0xE0020008
 0000002E  7001      STRB        R1,[R0,#0x0]
   28: }
 00000030          L_1:
 00000030  E7FE      B           L_1  ; T=0x00000030
 00000032            ; SCOPE-END
   30: }
 00000032  BC08      POP         {R3}
 00000034  4718      BX          R3
 00000036          ENDP ; 'main'


*** CODE SEGMENT '?PR?SPI_ISR?A?main':
   33: void SPI_ISR (void) __irq
 00000000  E92D0001  STMDB       R13!,{R0}
   34: {
 00000004            ; SCOPE-START
   37: result = S0SPSR;            //read and clear the status flags
 00000004  E5100000  LDR         R0,=0xE0020004
 00000008  E5D00000  LDRB        R0,[R0,#0x0]
 0000000C            ; SCOPE-END
 0000000C  E8BD0001  LDMIA       R13!,{R0}
 00000010  E25EF004  SUBS        R15,R14,#0x0004
 00000014          ENDP ; 'SPI_ISR?A'

ARM COMPILER V2.51a,  main                                                                 02/11/06  15:56:46  PAGE 3   



Module Information          Static
----------------------------------
  code size            =    ------
  data size            =    ------
  const size           =    ------
End of Module Information.


ARM COMPILATION COMPLETE.  0 WARNING(S),  0 ERROR(S)