cve4_defs.h

Zoran V966 DVD 解码 Soc芯片的源程序

/**********************************************************************************
 *  Copyright (c) 2004 ZORAN Corporation, All Rights Reserved
 *  THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF ZORAN CORPORATION
 *
 *  File: $Workfile: cve4_defs.h $
 *
 * Description:
 * ============
 * TV encoder.
 * 
 * Log:
 * ====
 * $Revision:  $
 * Last Modified by $Author:  $ at $Modtime:  $ 
 **********************************************************************************
 * Updates:
 **********************************************************************************
 * $Log: $
 * 
 * 
 *********************************************************************************/
#include "Config.h"		/* Global Configuration - do not remove! */


#ifndef _CVE4_DEFS_H_
#define _CVE4_DEFS_H_


/*** Include Files ***************************************************************/
#include "Include\sysdefs.h"


/*** Defines *********************************************************************/
#ifdef SUPPORT_PAL_60
#define P60(x)		,x
#else
#define P60(x)
#endif

#ifdef SUPPORT_PAL_M
#define PM(x)		,x
#else
#define PM(x)
#endif

#ifdef SUPPORT_PAL_NC
#define PNC(x)		,x
#else
#define PNC(x)
#endif

#ifdef SUPPORT_NTSC_443
#define N443(x)		,x
#else
#define N443(x)
#endif

#ifdef SUPPORT_NTSC_J
#define NJ(x)		,x
#else
#define NJ(x)
#endif

#define CVE4_NUM_OF_INTR_MV_ADDRESS		12
#define CVE4_NUM_OF_PROG_MV_ADDRESS		5


/*** Typedefs ********************************************************************/

enum
{
	CVE4_DAC1_CONFIG_CHROMA			= 0x0,
	CVE4_DAC1_CONFIG_CB_OR_B		= 0x1,
	CVE4_DAC1_CONFIG_MASK			= 0x3,
	CVE4_DAC2_CONFIG_CHROMA			= 0x0,
	CVE4_DAC2_CONFIG_LUMA			= 0x4,
	CVE4_DAC2_CONFIG_CR_OR_R		= 0x8,
	CVE4_DAC2_CONFIG_MASK			= 0xC,
	CVE4_DAC3_CONFIG_CHROMA			= 0x0,
	CVE4_DAC3_CONFIG_LUMA			= 0x10,
	CVE4_DAC3_CONFIG_CVBS			= 0x20,
	CVE4_DAC3_CONFIG_MASK			= 0x30,
	CVE4_DAC4_CONFIG_YC_OR_G		= 0x0,
	CVE4_DAC4_CONFIG_CVBS			= 0x40,
	CVE4_DAC4_CONFIG_MASK			= 0xC0,
	CVE4_DAC5_CONFIG_CHROMA			= 0x0,
	CVE4_DAC5_CONFIG_LUMA			= 0x100,
	CVE4_DAC5_CONFIG_CVBS			= 0x200,
	CVE4_DAC5_CONFIG_MASK			= 0x300
};


enum
{
	CVE4_DACS_ENABLED_MODE			= 0x0,
	CVE4_DACS_DISABLED_MODE			= 0x1,
	CVE4_DAC1_ENABLE				= 0x2,
	CVE4_DAC1_DISABLE				= 0x0,
	CVE4_DAC2_ENABLE				= 0x4,
	CVE4_DAC2_DISABLE				= 0x0,
	CVE4_DAC3_ENABLE				= 0x8,
	CVE4_DAC3_DISABLE				= 0x0,
	CVE4_DAC4_ENABLE				= 0x10,
	CVE4_DAC4_DISABLE				= 0x0,
	CVE4_DAC5_ENABLE				= 0x20,
	CVE4_DAC5_DISABLE				= 0x0,
	CVE4_DACS_MASK					= 0x3E
};


/* macro-vision modes */
enum
{
	CVE4_MV_MODE_OFF_NTSC			= 0,
	CVE4_MV_MODE_1_NTSC,
	CVE4_MV_MODE_2_NTSC,
	CVE4_MV_MODE_3_NTSC,
	CVE4_MV_MODE_OFF_PAL,
	CVE4_MV_MODE_ON_PAL,
#ifdef SUPPORT_PAL_60
	CVE4_MV_MODE_ON_PAL_60,
#endif
#ifdef SUPPORT_PAL_M
	CVE4_MV_MODE_ON_PAL_M,
#endif
#ifdef SUPPORT_NTSC_443
	CVE4_MV_MODE_ON_NTSC_443,
#endif
	CVE4_NUM_OF_INTR_MV_MODES,
	CVE4_MV_MODE_OFF_PROG_NTSC		= 0,
	CVE4_MV_MODE_ON_PROG_NTSC		= 1,
	CVE4_MV_MODE_OFF_PROG_PAL		= 2,
	CVE4_MV_MODE_ON_PROG_PAL		= 3,
	CVE4_NUM_OF_PROG_MV_MODES		= 4
};


/* WSS configuration */
enum
{
	WSS_CONFIG_CGMS_STYLE			= 0x0000,
	WSS_CONFIG_WSS_STYLE			= 0x0001,
	WSS_CONFIG_WSS_EDGE_SHIFT		= 1,	 
	WSS_CONFIG_WSS_EDGE_MASK		= 0x7,
	WSS_CONFIG_WSS_DISABLE			= 0x0000,
	WSS_CONFIG_WSS_ENABLE_F1		= 0x0010,
	WSS_CONFIG_WSS_ENABLE_PSO		= 0x0010,
	WSS_CONFIG_WSS_LINE_SHIFT		= 5,
	WSS_CONFIG_WSS_LINE_MASK		= 0x1F,
	WSS_CONFIG_WSS_ENABLE_F2		= 0x0800,
	WSS_CONFIG_WSS_ENABLE_MASK		= 0x0810
};


enum
{
	CC_CONFIG_CC_DISABLE			= 0x0,
	CC_CONFIG_CC_ENABLE				= 0x1,
	CC_CONFIG_CC_LINE_SHIFT			= 1,
	CC_CONFIG_CC_LINE_MASK			= 0x3E
};


enum
{
	DIS_RESYNC1_PIXEL_SHIFT			= 0,
	DIS_RESYNC1_PIXEL_MUSK			= 0x3FF,
	DIS_RESYNC1_RESYNC_ON			= 0x4000
};


#ifdef DAC_MONITOR_STATUS_ENABLE
enum
{
	DAC_MONITOR_SWITCH_DISABLE_OUTPUT	= 0x0,
	DAC_MONITOR_SWITCH_ENABLE_OUTPUT	= 0x100,
	DAC_MONITOR_SWITCH_DISABLE		= 0x0,
	DAC_MONITOR_SWITCH_ENABLE		= 0x200
};
#endif


/*** Extern **********************************************************************/


/*** Public Functions ************************************************************/


#endif