tlc5620.fit.eqn

这是一个用vhdl写的控制VGA的源程序,可以显示6种不同的图案,你也可以显示图象

--A1L45 is Mux~713 at LC5_B35
--operation mode is normal

A1L45 = A1L461 & !A1L261 & (A1L361 $ A1L161) # !A1L461 & (A1L361 & A1L261 # !A1L361 & (A1L161));

--A1L48 is Mux~750 at LC5_B35
--operation mode is normal

A1L48 = A1L461 & !A1L261 & (A1L361 $ A1L161) # !A1L461 & (A1L361 & A1L261 # !A1L361 & (A1L161));


--A1L55 is Mux~714 at LC2_B34
--operation mode is normal

A1L55 = A1L461 & A1L161 & (A1L361 # A1L261) # !A1L461 & (A1L161 # A1L361 $ A1L261);

--A1L58 is Mux~751 at LC2_B34
--operation mode is normal

A1L58 = A1L461 & A1L161 & (A1L361 # A1L261) # !A1L461 & (A1L161 # A1L361 $ A1L261);


--A1L65 is Mux~715 at LC6_B35
--operation mode is normal

A1L65 = A1L461 & A1L161 & (A1L361 $ !A1L261) # !A1L461 & (A1L161 # A1L361 & A1L261);

--A1L68 is Mux~752 at LC6_B35
--operation mode is normal

A1L68 = A1L461 & A1L161 & (A1L361 $ !A1L261) # !A1L461 & (A1L161 # A1L361 & A1L261);


--A1L75 is Mux~716 at LC7_B35
--operation mode is normal

A1L75 = A1L061 & (A1L561) # !A1L061 & (A1L561 & A1L55 # !A1L561 & (!A1L65));

--A1L78 is Mux~753 at LC7_B35
--operation mode is normal

A1L78 = A1L061 & (A1L561) # !A1L061 & (A1L561 & A1L55 # !A1L561 & (!A1L65));


--A1L85 is Mux~717 at LC8_B35
--operation mode is normal

A1L85 = A1L461 & !A1L261 & (A1L361 $ !A1L161) # !A1L461 & (A1L361 & (A1L161) # !A1L361 & A1L261);

--A1L88 is Mux~754 at LC8_B35
--operation mode is normal

A1L88 = A1L461 & !A1L261 & (A1L361 $ !A1L161) # !A1L461 & (A1L361 & (A1L161) # !A1L361 & A1L261);


--A1L95 is Mux~719 at LC3_B34
--operation mode is normal

A1L95 = A1L361 & (A1L561 & (!A1L161) # !A1L561 & !A1L461) # !A1L361 & (A1L461 $ (A1L561));

--A1L98 is Mux~755 at LC3_B34
--operation mode is normal

A1L98 = A1L361 & (A1L561 & (!A1L161) # !A1L561 & !A1L461) # !A1L361 & (A1L461 $ (A1L561));


--A1L06 is Mux~720 at LC4_B34
--operation mode is normal

A1L06 = A1L161 & (!A1L361 & !A1L561 # !A1L461) # !A1L161 & A1L561 & (A1L361 $ !A1L461);

--A1L09 is Mux~756 at LC4_B34
--operation mode is normal

A1L09 = A1L161 & (!A1L361 & !A1L561 # !A1L461) # !A1L161 & A1L561 & (A1L361 $ !A1L461);


--A1L16 is Mux~721 at LC6_B34
--operation mode is normal

A1L16 = A1L361 & (A1L461 $ (A1L561)) # !A1L361 & (A1L561 & A1L461 # !A1L561 & (A1L161));

--A1L19 is Mux~757 at LC6_B34
--operation mode is normal

A1L19 = A1L361 & (A1L461 $ (A1L561)) # !A1L361 & (A1L561 & A1L461 # !A1L561 & (A1L161));


--A1L26 is Mux~722 at LC7_B34
--operation mode is normal

A1L26 = A1L261 & (A1L061) # !A1L261 & (A1L061 & !A1L06 # !A1L061 & (!A1L16));

--A1L29 is Mux~758 at LC7_B34
--operation mode is normal

A1L29 = A1L261 & (A1L061) # !A1L261 & (A1L061 & !A1L06 # !A1L061 & (!A1L16));


--A1L36 is Mux~723 at LC8_B34
--operation mode is normal

A1L36 = !A1L461 & A1L161 & (A1L561 # !A1L361);

--A1L39 is Mux~759 at LC8_B34
--operation mode is normal

A1L39 = !A1L461 & A1L161 & (A1L561 # !A1L361);


--A1L46 is Mux~725 at LC6_B36
--operation mode is normal

A1L46 = A1L631 # F3_cs_buffer[5] $ (!F3_cs_buffer[2] # !F3_cs_buffer[4]);

--A1L49 is Mux~760 at LC6_B36
--operation mode is normal

A1L49 = A1L631 # F3_cs_buffer[5] $ (!F3_cs_buffer[2] # !F3_cs_buffer[4]);


--A1L56 is Mux~726 at LC1_B35
--operation mode is normal

A1L56 = A1L161 & !A1L061 & !A1L261 & !A1L361 # !A1L161 & (A1L261 # A1L361);

--A1L59 is Mux~761 at LC1_B35
--operation mode is normal

A1L59 = A1L161 & !A1L061 & !A1L261 & !A1L361 # !A1L161 & (A1L261 # A1L361);


--A1L66 is Mux~727 at LC7_B36
--operation mode is normal

A1L66 = A1L631 # F3_cs_buffer[4] & F3_cs_buffer[2] # !F3_cs_buffer[5];

--A1L69 is Mux~762 at LC7_B36
--operation mode is normal

A1L69 = A1L631 # F3_cs_buffer[4] & F3_cs_buffer[2] # !F3_cs_buffer[5];


--A1L76 is Mux~728 at LC8_B36
--operation mode is normal

A1L76 = A1L461 & (A1L561) # !A1L461 & (A1L561 & !A1L56 # !A1L561 & (A1L66));

--A1L79 is Mux~763 at LC8_B36
--operation mode is normal

A1L79 = A1L461 & (A1L561) # !A1L461 & (A1L561 & !A1L56 # !A1L561 & (A1L66));


--A1L86 is Mux~729 at LC2_B33
--operation mode is normal

A1L86 = A1L061 & (A1L261 # !A1L161) # !A1L061 & !A1L161 & (A1L261 # A1L361);

--A1L89 is Mux~764 at LC2_B33
--operation mode is normal

A1L89 = A1L061 & (A1L261 # !A1L161) # !A1L061 & !A1L161 & (A1L261 # A1L361);


--A1L96 is Mux~731 at LC3_B35
--operation mode is normal

A1L96 = A1L261 & A1L461 & A1L561 & A1L061;

--A1L99 is Mux~765 at LC3_B35
--operation mode is normal

A1L99 = A1L261 & A1L461 & A1L561 & A1L061;


--tmp[3] is tmp[3] at LC3_B30
--operation mode is normal

tmp[3]_lut_out = F3_cs_buffer[3] & !A1L631;
tmp[3] = DFFEA(tmp[3]_lut_out, GLOBAL(sload), , , , , );

--A1L151Q is tmp[3]~373 at LC3_B30
--operation mode is normal

A1L151Q = tmp[3];


--tmp[2] is tmp[2] at LC2_B30
--operation mode is normal

tmp[2]_lut_out = F3_cs_buffer[2] & !A1L631;
tmp[2] = DFFEA(tmp[2]_lut_out, GLOBAL(sload), , , , , );

--A1L941Q is tmp[2]~374 at LC2_B30
--operation mode is normal

A1L941Q = tmp[2];


--tmp[1] is tmp[1] at LC1_B30
--operation mode is normal

tmp[1]_lut_out = F3_cs_buffer[1] & !A1L631;
tmp[1] = DFFEA(tmp[1]_lut_out, GLOBAL(sload), , , , , );

--A1L741Q is tmp[1]~375 at LC1_B30
--operation mode is normal

A1L741Q = tmp[1];


--A1L531 is reduce_nor~68 at LC6_B30
--operation mode is normal

A1L531 = tmp[3] & tmp[2] & tmp[1] & !tmp[0];

--A1L731 is reduce_nor~72 at LC6_B30
--operation mode is normal

A1L731 = tmp[3] & tmp[2] & tmp[1] & !tmp[0];

--A1L831 is reduce_nor~73 at LC6_B30
--operation mode is normal

A1L831 = tmp[3] & tmp[2] & tmp[1] & !tmp[0];


--tmp[5] is tmp[5] at LC1_B26
--operation mode is normal

tmp[5]_lut_out = F3_cs_buffer[5] & !A1L631;
tmp[5] = DFFEA(tmp[5]_lut_out, GLOBAL(sload), , , , , );

--A1L551Q is tmp[5]~376 at LC1_B26
--operation mode is normal

A1L551Q = tmp[5];


--tmp[4] is tmp[4] at LC1_B25
--operation mode is normal

tmp[4]_lut_out = F3_cs_buffer[4] & !A1L631;
tmp[4] = DFFEA(tmp[4]_lut_out, GLOBAL(sload), , , , , );

--A1L351Q is tmp[4]~377 at LC1_B25
--operation mode is normal

A1L351Q = tmp[4];


--tmp[7] is tmp[7] at LC8_B30
--operation mode is normal

tmp[7]_lut_out = D1_unreg_res_node[7];
tmp[7] = DFFEA(tmp[7]_lut_out, GLOBAL(sload), , , , , );

--A1L951Q is tmp[7]~378 at LC8_B30
--operation mode is normal

A1L951Q = tmp[7];


--tmp[6] is tmp[6] at LC5_B30
--operation mode is normal

tmp[6]_lut_out = F3_cs_buffer[6];
tmp[6] = DFFEA(tmp[6]_lut_out, GLOBAL(sload), , , , , );

--A1L751Q is tmp[6]~379 at LC5_B30
--operation mode is normal

A1L751Q = tmp[6];


--A1L631 is reduce_nor~70 at LC7_B30
--operation mode is normal

A1L631 = (tmp[5] & tmp[4] & !tmp[7] & !tmp[6]) & CASCADE(A1L831);

--A1L931 is reduce_nor~74 at LC7_B30
--operation mode is normal

A1L931 = (tmp[5] & tmp[4] & !tmp[7] & !tmp[6]) & CASCADE(A1L831);


--F3_cs_buffer[6] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] at LC7_B32
--operation mode is arithmetic

F3_cs_buffer[6] = tmp[6] $ F3_cout[5];

--F3L12 is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]~118 at LC7_B32
--operation mode is arithmetic

F3L12 = tmp[6] $ F3_cout[5];

--F3_cout[6] is lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[6] at LC7_B32
--operation mode is arithmetic

F3_cout[6] = CARRY(tmp[6] & F3_cout[5]);


--D1_unreg_res_node[7] is lpm_add_sub:add_rtl_1|addcore:adder|unreg_res_node[7] at LC8_B32
--operation mode is normal

D1_unreg_res_node[7] = F3_cout[6] $ tmp[7];

--D1L3 is lpm_add_sub:add_rtl_1|addcore:adder|unreg_res_node[7]~15 at LC8_B32
--operation mode is normal

D1L3 = F3_cout[6] $ tmp[7];


--A1L32 is Mux~669 at LC3_B23
--operation mode is normal

A1L32 = tmp[0] & (F3_cs_buffer[5] $ F3_cs_buffer[2] $ !F3_cs_buffer[4]) # !tmp[0] & (F3_cs_buffer[5] & (F3_cs_buffer[2] # F3_cs_buffer[4]) # !F3_cs_buffer[5] & (!F3_cs_buffer[4]));

--A1L001 is Mux~766 at LC3_B23
--operation mode is normal

A1L001 = tmp[0] & (F3_cs_buffer[5] $ F3_cs_buffer[2] $ !F3_cs_buffer[4]) # !tmp[0] & (F3_cs_buffer[5] & (F3_cs_buffer[2] # F3_cs_buffer[4]) # !F3_cs_buffer[5] & (!F3_cs_buffer[4]));


--A1L42 is Mux~670 at LC4_B23
--operation mode is normal

A1L42 = F3_cs_buffer[5] & (F3_cs_buffer[2] $ F3_cs_buffer[4]) # !F3_cs_buffer[5] & F3_cs_buffer[4] & (!F3_cs_buffer[2] # !tmp[0]);

--A1L101 is Mux~767 at LC4_B23
--operation mode is normal

A1L101 = F3_cs_buffer[5] & (F3_cs_buffer[2] $ F3_cs_buffer[4]) # !F3_cs_buffer[5] & F3_cs_buffer[4] & (!F3_cs_buffer[2] # !tmp[0]);


--A1L22 is Mux~668 at LC5_B23
--operation mode is normal

A1L22 = F3_cs_buffer[1] & (A1L42) # !F3_cs_buffer[1] & A1L32;

--A1L201 is Mux~768 at LC5_B23
--operation mode is normal

A1L201 = F3_cs_buffer[1] & (A1L42) # !F3_cs_buffer[1] & A1L32;


--A1L62 is Mux~672 at LC6_B23
--operation mode is normal

A1L62 = F3_cs_buffer[4] & (F3_cs_buffer[5] & !tmp[0] # !F3_cs_buffer[5] & (!F3_cs_buffer[2])) # !F3_cs_buffer[4] & (tmp[0] & (F3_cs_buffer[2]) # !tmp[0] & !F3_cs_buffer[5]);

--A1L301 is Mux~769 at LC6_B23
--operation mode is normal

A1L301 = F3_cs_buffer[4] & (F3_cs_buffer[5] & !tmp[0] # !F3_cs_buffer[5] & (!F3_cs_buffer[2])) # !F3_cs_buffer[4] & (tmp[0] & (F3_cs_buffer[2]) # !tmp[0] & !F3_cs_buffer[5]);


--A1L72 is Mux~673 at LC7_B23
--operation mode is normal

A1L72 = tmp[0] & (F3_cs_buffer[5] $ F3_cs_buffer[2] $ F3_cs_buffer[4]) # !tmp[0] & (!F3_cs_buffer[2] & !F3_cs_buffer[4]);

--A1L401 is Mux~770 at LC7_B23
--operation mode is normal

A1L401 = tmp[0] & (F3_cs_buffer[5] $ F3_cs_buffer[2] $ F3_cs_buffer[4]) # !tmp[0] & (!F3_cs_buffer[2] & !F3_cs_buffer[4]);


--A1L52 is Mux~671 at LC8_B23
--operation mode is normal

A1L52 = F3_cs_buffer[1] & (A1L72) # !F3_cs_buffer[1] & A1L62;

--A1L501 is Mux~771 at LC8_B23
--operation mode is normal

A1L501 = F3_cs_buffer[1] & (A1L72) # !F3_cs_buffer[1] & A1L62;


--A1L92 is Mux~680 at LC3_B27
--operation mode is normal

A1L92 = F3_cs_buffer[1] & (tmp[0] $ !F3_cs_buffer[5] # !F3_cs_buffer[3]) # !F3_cs_buffer[1] & (!F3_cs_buffer[5]);

--A1L601 is Mux~772 at LC3_B27
--operation mode is normal

A1L601 = F3_cs_buffer[1] & (tmp[0] $ !F3_cs_buffer[5] # !F3_cs_buffer[3]) # !F3_cs_buffer[1] & (!F3_cs_buffer[5]);


--A1L03 is Mux~681 at LC4_B27
--operation mode is normal

A1L03 = F3_cs_buffer[5] & (F3_cs_buffer[3] & (F3_cs_buffer[1]) # !F3_cs_buffer[3] & !tmp[0]) # !F3_cs_buffer[5] & (tmp[0] $ F3_cs_buffer[1] $ !F3_cs_buffer[3]);

--A1L701 is Mux~773 at LC4_B27
--operation mode is normal

A1L701 = F3_cs_buffer[5] & (F3_cs_buffer[3] & (F3_cs_buffer[1]) # !F3_cs_buffer[3] & !tmp[0]) # !F3_cs_buffer[5] & (tmp[0] $ F3_cs_buffer[1] $ !F3_cs_buffer[3]);


--A1L82 is Mux~679 at LC5_B27
--operation mode is normal

A1L82 = F3_cs_buffer[2] & (A1L03) # !F3_cs_buffer[2] & A1L92;

--A1L801 is Mux~774 at LC5_B27
--operation mode is normal

A1L801 = F3_cs_buffer[2] & (A1L03) # !F3_cs_buffer[2] & A1L92;


--A1L23 is Mux~683 at LC6_B27
--operation mode is normal

A1L23 = F3_cs_buffer[1] & (F3_cs_buffer[3] & !tmp[0] # !F3_cs_buffer[3] & (F3_cs_buffer[5])) # !F3_cs_buffer[1] & (F3_cs_buffer[3] $ (tmp[0] & !F3_cs_buffer[5]));

--A1L901 is Mux~775 at LC6_B27
--operation mode is normal

A1L901 = F3_cs_buffer[1] & (F3_cs_buffer[3] & !tmp[0] # !F3_cs_buffer[3] & (F3_cs_buffer[5])) # !F3_cs_buffer[1] & (F3_cs_buffer[3] $ (tmp[0] & !F3_cs_buffer[5]));


--A1L33 is Mux~684 at LC7_B27
--operation mode is normal

A1L33 = tmp[0] & (F3_cs_buffer[1] & F3_cs_buffer[5] # !F3_cs_buffer[1] & (F3_cs_buffer[3] # !F3_cs_buffer[5])) # !tmp[0] & (F3_cs_buffer[1] & !F3_cs_buffer[5] & !F3_cs_buffer[3] # !F3_cs_buffer[1] & F3_cs_buffer[5]);

--A1L011 is Mux~776 at LC7_B27
--operation mode is normal

A1L011 = tmp[0] & (F3_cs_buffer[1] & F3_cs_buffer[5] # !F3_cs_buffer[1] & (F3_cs_buffer[3] # !F3_cs_buffer[5])) # !tmp[0] & (F3_cs_buffer[1] & !F3_cs_buffer[5] & !F3_cs_buffer[3] # !F3_cs_buffer[1] & F3_cs_buffer[5]);


--A1L13 is Mux~682 at LC8_B27
--operation mode is normal

A1L13 = F3_cs_buffer[2] & (A1L33) # !F3_cs_buffer[2] & A1L23;

--A1L111 is Mux~777 at LC8_B27
--operation mode is normal

A1L111 = F3_cs_buffer[2] & (A1L33) # !F3_cs_buffer[2] & A1L23;


--A1L53 is Mux~691 at LC3_B28
--operation mode is normal

A1L53 = tmp[0] & (F3_cs_buffer[4] & (F3_cs_buffer[5] # !F3_cs_buffer[1]) # !F3_cs_buffer[4] & !F3_cs_buffer[5]) # !tmp[0] & (F3_cs_buffer[4] $ (F3_cs_buffer[5] # !F3_cs_buffer[1]));

--A1L211 is Mux~778 at LC3_B28
--operation mode is normal

A1L211 = tmp[0] & (F3_cs_buffer[4] & (F3_cs_buffer[5] # !F3_cs_buffer[1]) # !F3_cs_buffer[4] & !F3_cs_buffer[5]) # !tmp[0] & (F3_cs_buffer[4] $ (F3_cs_buffer[5] # !F3_cs_buffer[1]));


--A1L63 is Mux~692 at LC4_B28
--operation mode is normal

A1L63 = tmp[0] & (F3_cs_buffer[4] & F3_cs_buffer[5] & F3_cs_buffer[1] # !F3_cs_buffer[4] & (F3_cs_buffer[5] $ F3_cs_buffer[1])) # !tmp[0] & (F3_cs_buffer[4] $ F3_cs_buffer[5] $ !F3_cs_buffer[1]);

--A1L311 is Mux~779 at LC4_B28
--operation mode is normal

A1L311 = tmp[0] & (F3_cs_buffer[4] & F3_cs_buffer[5] & F3_cs_buffer[1] # !F3_cs_buffer[4] & (F3_cs_buffer[5] $ F3_cs_buffer[1])) # !tmp[0] & (F3_cs_buffer[4] $ F3_cs_buffer[5] $ !F3_cs_buffer[1]);


--A1L43 is Mux~690 at LC5_B28
--operation mode is normal

A1L43 = F3_cs_buffer[3] & (A1L63) # !F3_cs_buffer[3] & A1L53;

--A1L411 is Mux~780 at LC5_B28
--operation mode is normal

A1L411 = F3_cs_buffer[3] & (A1L63) # !F3_cs_buffer[3] & A1L53;


--A1L83 is Mux~694 at LC6_B28
--operation mode is normal

A1L83 = F3_cs_buffer[1] & tmp[0] & F3_cs_buffer[4] & !F3_cs_buffer[5] # !F3_cs_buffer[1] & (F3_cs_buffer[4] $ !F3_cs_buffer[5]);

--A1L511 is Mux~781 at LC6_B28
--operation mode is normal

A1L511 = F3_cs_buffer[1] & tmp[0] & F3_cs_buffer[4] & !F3_cs_buffer[5] # !F3_cs_buffer[1] & (F3_cs_buffer[4] $ !F3_cs_buffer[5]);


--A1L93 is Mux~695 at LC7_B28
--operation mode is normal

A1L93 = tmp[0] & (F3_cs_buffer[4] & F3_cs_buffer[5] # !F3_cs_buffer[4] & (F3_cs_buffer[1] # !F3_cs_buffer[5])) # !tmp[0] & F3_cs_buffer[4] & (!F3_cs_buffer[1]);

--A1L611 is Mux~782 at LC7_B28
--operation mode is normal

A1L611 = tmp[0] & (F3_cs_buffer[4] & F3_cs_buffer[5] # !F3_cs_buffer[4] & (F3_cs_buffer[1] # !F3_cs_buffer[5])) # !tmp[0] & F3_cs_buffer[4] & (!F3_cs_buffer[1]);


--A1L73 is Mux~693 at LC8_B28
--operation mode is normal

A1L73 = F3_cs_buffer[3] & (A1L93) # !F3_cs_buffer[3] & A1L83;

--A1L711 is Mux~783 at LC8_B28
--operation mode is normal

A1L711 = F3_cs_buffer[3] & (A1L93) # !F3_cs_buffer[3] & A1L83;


--clk is clk at PIN_125
--operation mode is input

clk = INPUT();


--rng is rng at PIN_72
--operation mode is input

rng = INPUT();


--a0 is a0 at PIN_68
--operation mode is input

a0 = INPUT();


--a1 is a1 at PIN_70
--operation mode is input

a1 = INPUT();


--ladc is ladc at PIN_136
--operation mode is output

ladc = OUTPUT(GND);


--load is load at PIN_140
--operation mode is output

load = OUTPUT(A1L12);


--data is data at PIN_137
--operation mode is output

data = OUTPUT(A1L81Q);


--daclk is daclk at PIN_138
--operation mode is output

daclk = OUTPUT(A1L21);


--A1L12 is load~0 at LC1_C32
--operation mode is normal

A1L12 = sload;