frequent.rp-

这是个用VHDL写的测频源程序,最大可测10M,你可以任意修改,但请你更新后发一份给我

    Output DEF_1663

        10 Input(s)
            COUNT2Z0Z_1, COUNT6Z0Z_3, COUNT6Z0Z_2, COUNT3Z0Z_1,
            COUNTZ0Z_0, COUNT6Z0Z_1, COUNTZ0Z_1, COUNT6Z0Z_0,
            COUNT0Z0Z_1, COUNTZ0Z_2
        1 Fanout(s)
            glb02.I0
        11 Product Term(s)
        1 GLB Level(s)

        DEF_1663 = (COUNTZ0Z_0 & !COUNTZ0Z_1 & !COUNTZ0Z_2 & !COUNT3Z0Z_1
            # !COUNTZ0Z_0 & !COUNTZ0Z_1 & !COUNTZ0Z_2 & !COUNT2Z0Z_1
            # COUNT3Z0Z_1 & COUNTZ0Z_0 & !COUNT6Z0Z_0 & !COUNT6Z0Z_1
            & !COUNT6Z0Z_2 & !COUNT6Z0Z_3
            # COUNTZ0Z_0 & !COUNTZ0Z_1 & !COUNT6Z0Z_0 & !COUNT6Z0Z_1
            & !COUNT6Z0Z_2 & !COUNT6Z0Z_3
            # !COUNTZ0Z_1 & !COUNTZ0Z_2 & !COUNT6Z0Z_0 & !COUNT6Z0Z_1
            & !COUNT6Z0Z_2 & !COUNT6Z0Z_3
            # COUNT2Z0Z_1 & COUNTZ0Z_1 & !COUNTZ0Z_0 & !COUNT6Z0Z_0
            & !COUNT6Z0Z_1 & !COUNT6Z0Z_2 & !COUNT6Z0Z_3)
            $ (COUNTZ0Z_0 & COUNTZ0Z_2 & !COUNT6Z0Z_1
            # COUNTZ0Z_1 & COUNTZ0Z_2 & !COUNT6Z0Z_1
            # COUNTZ0Z_0 & !COUNT6Z0Z_0 & !COUNT6Z0Z_1 & !COUNT6Z0Z_2
            & !COUNT6Z0Z_3
            # COUNTZ0Z_1 & !COUNT6Z0Z_0 & !COUNT6Z0Z_1 & !COUNT6Z0Z_2
            & !COUNT6Z0Z_3
            # COUNT0Z0Z_1 & !COUNTZ0Z_2 & !COUNT6Z0Z_0 & !COUNT6Z0Z_1
            & !COUNT6Z0Z_2 & !COUNT6Z0Z_3)

    Output DEF_1649

        8 Input(s)
            COUNT4Z0Z_1, COUNT6Z0Z_3, COUNT6Z0Z_2, COUNTZ0Z_0,
            COUNT6Z0Z_1, COUNTZ0Z_1, COUNT6Z0Z_0, COUNTZ0Z_2
        1 Fanout(s)
            glb02.I6
        3 Product Term(s)
        1 GLB Level(s)

        DEF_1649 = (COUNTZ0Z_1 & !COUNTZ0Z_0 & !COUNT4Z0Z_1
            # !COUNTZ0Z_0 & !COUNT6Z0Z_0 & !COUNT6Z0Z_1 & !COUNT6Z0Z_2
            & !COUNT6Z0Z_3 & !COUNT4Z0Z_1)
            $ !COUNTZ0Z_0 & !COUNTZ0Z_2 & !COUNT6Z0Z_0 & !COUNT6Z0Z_1
            & !COUNT6Z0Z_2 & !COUNT6Z0Z_3 & !COUNT4Z0Z_1

    Output AND_1692

        8 Input(s)
            COUNT6Z0Z_3, COUNT6Z0Z_2, COUNTZ0Z_0, COUNT6Z0Z_1,
            COUNT1Z0Z_3, COUNTZ0Z_1, COUNT6Z0Z_0, COUNTZ0Z_2
        1 Fanout(s)
            glb02.I7
        1 Product Term(s)
        1 GLB Level(s)

        AND_1692 = COUNTZ0Z_0 & !COUNTZ0Z_1 & !COUNTZ0Z_2 & !COUNT6Z0Z_0
            & !COUNT6Z0Z_1 & !COUNT6Z0Z_2 & !COUNT6Z0Z_3 & !COUNT1Z0Z_3


GLB glb10, A5

    6 Input(s)
        (glb10.O0, COUT5Z0Z_0, I16), (glb01.O2, COUTAZ0Z_0, I1), 
        (glb01.O1, COUTAZ0Z_1, I2), (glb01.O0, COUTAZ0Z_2, I3), 
        (glb14.O0, COUTAZ0Z_3, I4), (glb16.O0, MZ0Z4, I0)
    1 Output(s)
        (COUT5Z0Z_0, O0)
    4 Product Term(s)

    Output COUT5Z0Z_0

        6 Input(s)
            COUT5Z0Z_0, COUTAZ0Z_0, COUTAZ0Z_1, COUTAZ0Z_2, MZ0Z4,
            COUTAZ0Z_3
        3 Fanout(s)
            glb10.I16, glb29.I4, glb17.I11
        2 Product Term(s)
        1 GLB Level(s)

        COUT5Z0Z_0.D = COUTAZ0Z_3 & !COUT5Z0Z_0
            # COUT5Z0Z_0 & !COUTAZ0Z_3
        !COUT5Z0Z_0.C = MZ0Z4
        COUT5Z0Z_0.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3


GLB glb11, C3

    6 Input(s)
        (glb11.O0, COUT4Z0Z_0, I16), (glb01.O2, COUTAZ0Z_0, I14), 
        (glb01.O1, COUTAZ0Z_1, I13), (glb01.O0, COUTAZ0Z_2, I12), 
        (glb14.O0, COUTAZ0Z_3, I11), (glb15.O0, MZ0Z3, I7)
    1 Output(s)
        (COUT4Z0Z_0, O0)
    4 Product Term(s)

    Output COUT4Z0Z_0

        6 Input(s)
            MZ0Z3, COUTAZ0Z_0, COUTAZ0Z_1, COUT4Z0Z_0, COUTAZ0Z_2,
            COUTAZ0Z_3
        3 Fanout(s)
            glb16.I8, glb11.I16, glb28.I3
        2 Product Term(s)
        1 GLB Level(s)

        COUT4Z0Z_0.D = COUTAZ0Z_3 & !COUT4Z0Z_0
            # COUT4Z0Z_0 & !COUTAZ0Z_3
        !COUT4Z0Z_0.C = MZ0Z3
        COUT4Z0Z_0.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3


GLB glb12, B0

    6 Input(s)
        (glb12.O0, COUT3Z0Z_0, I16), (glb01.O2, COUTAZ0Z_0, I1), 
        (glb01.O1, COUTAZ0Z_1, I2), (glb01.O0, COUTAZ0Z_2, I3), 
        (glb14.O0, COUTAZ0Z_3, I4), (glb19.O0, MZ0Z2, I0)
    1 Output(s)
        (COUT3Z0Z_0, O0)
    4 Product Term(s)

    Output COUT3Z0Z_0

        6 Input(s)
            MZ0Z2, COUT3Z0Z_0, COUTAZ0Z_0, COUTAZ0Z_1, COUTAZ0Z_2,
            COUTAZ0Z_3
        3 Fanout(s)
            glb27.I0, glb12.I16, glb15.I0
        2 Product Term(s)
        1 GLB Level(s)

        COUT3Z0Z_0.D = COUTAZ0Z_3 & !COUT3Z0Z_0
            # COUT3Z0Z_0 & !COUTAZ0Z_3
        !COUT3Z0Z_0.C = MZ0Z2
        COUT3Z0Z_0.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3


GLB glb13, B2

    5 Input(s)
        (glb13.O0, COUT1Z0Z_0, I16), (glb01.O2, COUTAZ0Z_0, I1), 
        (glb01.O1, COUTAZ0Z_1, I2), (glb01.O0, COUTAZ0Z_2, I3), 
        (glb14.O0, COUTAZ0Z_3, I4)
    1 Output(s)
        (COUT1Z0Z_0, O0)
    3 Product Term(s)

    Output COUT1Z0Z_0

        5 Input(s)
            COUTAZ0Z_0, COUTAZ0Z_1, COUTAZ0Z_2, COUT1Z0Z_0, COUTAZ0Z_3
        3 Fanout(s)
            glb18.I3, glb13.I16, glb24.I3
        2 Product Term(s)
        1 GLB Level(s)

        COUT1Z0Z_0.D = COUTAZ0Z_3 & !COUT1Z0Z_0
            # COUT1Z0Z_0 & !COUTAZ0Z_3
        !COUT1Z0Z_0.C = MZ0Z0
        COUT1Z0Z_0.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3


GLB glb14, D1

    5 Input(s)
        (CLK1.O, CLK1X, I5), (glb01.O2, COUTAZ0Z_0, I14), (glb01.O1, 
        COUTAZ0Z_1, I13), (glb01.O0, COUTAZ0Z_2, I12), (glb14.O0, 
        COUTAZ0Z_3, I16)
    1 Output(s)
        (COUTAZ0Z_3, O0)
    5 Product Term(s)

    Output COUTAZ0Z_3

        5 Input(s)
            COUTAZ0Z_0, COUTAZ0Z_1, COUTAZ0Z_2, COUTAZ0Z_3, CLK1X
        21 Fanout(s)
            glb27.I15, glb16.I4, glb10.I4, glb29.I15, glb18.I4, glb12.I4,
            glb20.I4, glb13.I4, glb26.I4, glb24.I4, glb15.I15, glb06.I11,
            glb17.I0, glb11.I11, glb23.I0, glb22.I11, glb14.I16,
            glb25.I11, glb19.I11, glb21.I0, glb28.I11
        4 Product Term(s)
        1 GLB Level(s)

        COUTAZ0Z_3.D = COUTAZ0Z_3 & !COUTAZ0Z_0
            # COUTAZ0Z_3 & !COUTAZ0Z_1
            # COUTAZ0Z_3 & !COUTAZ0Z_2
            # COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3
        COUTAZ0Z_3.C = CLK1X
        COUTAZ0Z_3.R = 

GLB glb15, B7

    10 Input(s)
        (glb12.O0, COUT3Z0Z_0, I0), (glb15.O3, COUT3Z0Z_1, I11), 
        (glb15.O2, COUT3Z0Z_2, I10), (glb15.O1, COUT3Z0Z_3, I17), 
        (glb01.O2, COUTAZ0Z_0, I1), (glb01.O1, COUTAZ0Z_1, I2), 
        (glb01.O0, COUTAZ0Z_2, I3), (glb14.O0, COUTAZ0Z_3, I15), 
        (glb19.O0, MZ0Z2, I4), (glb15.O0, MZ0Z3, I16)
    4 Output(s)
        (MZ0Z3, O0), (COUT3Z0Z_3, O1), (COUT3Z0Z_2, O2), 
        (COUT3Z0Z_1, O3)
    17 Product Term(s)

    Output MZ0Z3

        10 Input(s)
            MZ0Z3, MZ0Z2, COUT3Z0Z_0, COUT3Z0Z_1, COUT3Z0Z_2, COUT3Z0Z_3,
            COUTAZ0Z_0, COUTAZ0Z_1, COUTAZ0Z_2, COUTAZ0Z_3
        3 Fanout(s)
            glb16.I12, glb15.I16, glb11.I7
        3 Product Term(s)
        1 GLB Level(s)

        MZ0Z3.D = (!MZ0Z3 & !COUTAZ0Z_3
            # COUT3Z0Z_0 & COUT3Z0Z_3 & COUTAZ0Z_3 & !COUT3Z0Z_1
            & !COUT3Z0Z_2)
            $ VCC
        !MZ0Z3.C = MZ0Z2
        MZ0Z3.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT3Z0Z_3

        9 Input(s)
            MZ0Z2, COUT3Z0Z_0, COUT3Z0Z_1, COUT3Z0Z_2, COUT3Z0Z_3,
            COUTAZ0Z_0, COUTAZ0Z_1, COUTAZ0Z_2, COUTAZ0Z_3
        2 Fanout(s)
            glb15.I17, glb28.I6
        5 Product Term(s)
        1 GLB Level(s)

        COUT3Z0Z_3.D = (COUT3Z0Z_3 & !COUT3Z0Z_0
            # COUT3Z0Z_3 & !COUTAZ0Z_3
            # COUT3Z0Z_2 & COUT3Z0Z_3 & !COUT3Z0Z_1
            # COUT3Z0Z_1 & COUT3Z0Z_3 & !COUT3Z0Z_2
            # COUT3Z0Z_0 & COUT3Z0Z_1 & COUT3Z0Z_2 & COUTAZ0Z_3
            & !COUT3Z0Z_3)
        !COUT3Z0Z_3.C = MZ0Z2
        COUT3Z0Z_3.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT3Z0Z_2

        8 Input(s)
            MZ0Z2, COUT3Z0Z_0, COUT3Z0Z_1, COUT3Z0Z_2, COUTAZ0Z_0,
            COUTAZ0Z_1, COUTAZ0Z_2, COUTAZ0Z_3
        2 Fanout(s)
            glb27.I10, glb15.I10
        4 Product Term(s)
        1 GLB Level(s)

        COUT3Z0Z_2.D = COUT3Z0Z_2 & !COUT3Z0Z_0
            # COUT3Z0Z_2 & !COUT3Z0Z_1
            # COUT3Z0Z_2 & !COUTAZ0Z_3
            # COUT3Z0Z_0 & COUT3Z0Z_1 & COUTAZ0Z_3 & !COUT3Z0Z_2
        !COUT3Z0Z_2.C = MZ0Z2
        COUT3Z0Z_2.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT3Z0Z_1

        9 Input(s)
            MZ0Z2, COUT3Z0Z_0, COUT3Z0Z_1, COUT3Z0Z_2, COUT3Z0Z_3,
            COUTAZ0Z_0, COUTAZ0Z_1, COUTAZ0Z_2, COUTAZ0Z_3
        2 Fanout(s)
            glb27.I11, glb15.I11
        4 Product Term(s)
        1 GLB Level(s)

        COUT3Z0Z_1.D = COUT3Z0Z_1 & !COUT3Z0Z_0
            # COUT3Z0Z_1 & !COUTAZ0Z_3
            # COUT3Z0Z_0 & COUT3Z0Z_2 & COUTAZ0Z_3 & !COUT3Z0Z_1
            # COUT3Z0Z_0 & COUTAZ0Z_3 & !COUT3Z0Z_1 & !COUT3Z0Z_3
        !COUT3Z0Z_1.C = MZ0Z2
        COUT3Z0Z_1.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3


GLB glb16, A4

    10 Input(s)
        (glb11.O0, COUT4Z0Z_0, I8), (glb16.O3, COUT4Z0Z_1, I7), 
        (glb16.O2, COUT4Z0Z_2, I2), (glb16.O1, COUT4Z0Z_3, I17), 
        (glb01.O2, COUTAZ0Z_0, I1), (glb01.O1, COUTAZ0Z_1, I9), 
        (glb01.O0, COUTAZ0Z_2, I3), (glb14.O0, COUTAZ0Z_3, I4), 
        (glb15.O0, MZ0Z3, I12), (glb16.O0, MZ0Z4, I16)
    4 Output(s)
        (MZ0Z4, O0), (COUT4Z0Z_3, O1), (COUT4Z0Z_2, O2), 
        (COUT4Z0Z_1, O3)
    17 Product Term(s)

    Output MZ0Z4

        10 Input(s)
            MZ0Z3, COUT4Z0Z_3, COUTAZ0Z_0, COUTAZ0Z_1, COUT4Z0Z_0,
            COUTAZ0Z_2, COUT4Z0Z_1, MZ0Z4, COUTAZ0Z_3, COUT4Z0Z_2
        3 Fanout(s)
            glb16.I16, glb10.I0, glb17.I15
        3 Product Term(s)
        1 GLB Level(s)

        MZ0Z4.D = (!MZ0Z4 & !COUTAZ0Z_3
            # COUT4Z0Z_0 & COUT4Z0Z_3 & COUTAZ0Z_3 & !COUT4Z0Z_1
            & !COUT4Z0Z_2)
            $ VCC
        !MZ0Z4.C = MZ0Z3
        MZ0Z4.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT4Z0Z_3

        9 Input(s)
            MZ0Z3, COUT4Z0Z_3, COUTAZ0Z_0, COUTAZ0Z_1, COUT4Z0Z_0,
            COUTAZ0Z_2, COUT4Z0Z_1, COUTAZ0Z_3, COUT4Z0Z_2
        2 Fanout(s)
            glb16.I17, glb29.I5
        5 Product Term(s)
        1 GLB Level(s)

        COUT4Z0Z_3.D = (COUT4Z0Z_3 & !COUT4Z0Z_0
            # COUT4Z0Z_3 & !COUTAZ0Z_3
            # COUT4Z0Z_2 & COUT4Z0Z_3 & !COUT4Z0Z_1
            # COUT4Z0Z_1 & COUT4Z0Z_3 & !COUT4Z0Z_2
            # COUT4Z0Z_0 & COUT4Z0Z_1 & COUT4Z0Z_2 & COUTAZ0Z_3
            & !COUT4Z0Z_3)
        !COUT4Z0Z_3.C = MZ0Z3
        COUT4Z0Z_3.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT4Z0Z_2

        8 Input(s)
            MZ0Z3, COUTAZ0Z_0, COUTAZ0Z_1, COUT4Z0Z_0, COUTAZ0Z_2,
            COUT4Z0Z_1, COUTAZ0Z_3, COUT4Z0Z_2
        2 Fanout(s)
            glb16.I2, glb29.I2
        4 Product Term(s)
        1 GLB Level(s)

        COUT4Z0Z_2.D = COUT4Z0Z_2 & !COUT4Z0Z_0
            # COUT4Z0Z_2 & !COUT4Z0Z_1
            # COUT4Z0Z_2 & !COUTAZ0Z_3
            # COUT4Z0Z_0 & COUT4Z0Z_1 & COUTAZ0Z_3 & !COUT4Z0Z_2
        !COUT4Z0Z_2.C = MZ0Z3
        COUT4Z0Z_2.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT4Z0Z_1

        9 Input(s)
            MZ0Z3, COUT4Z0Z_3, COUTAZ0Z_0, COUTAZ0Z_1, COUT4Z0Z_0,
            COUTAZ0Z_2, COUT4Z0Z_1, COUTAZ0Z_3, COUT4Z0Z_2
        2 Fanout(s)
            glb16.I7, glb28.I8
        4 Product Term(s)
        1 GLB Level(s)

        COUT4Z0Z_1.D = COUT4Z0Z_1 & !COUT4Z0Z_0
            # COUT4Z0Z_1 & !COUTAZ0Z_3
            # COUT4Z0Z_0 & COUT4Z0Z_2 & COUTAZ0Z_3 & !COUT4Z0Z_1
            # COUT4Z0Z_0 & COUTAZ0Z_3 & !COUT4Z0Z_1 & !COUT4Z0Z_3
        !COUT4Z0Z_1.C = MZ0Z3
        COUT4Z0Z_1.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3


GLB glb17, C1

    10 Input(s)
        (glb10.O0, COUT5Z0Z_0, I11), (glb17.O3, COUT5Z0Z_1, I17), 
        (glb17.O2, COUT5Z0Z_2, I9), (glb17.O1, COUT5Z0Z_3, I10), 
        (glb01.O2, COUTAZ0Z_0, I14), (glb01.O1, COUTAZ0Z_1, I13), 
        (glb01.O0, COUTAZ0Z_2, I12), (glb14.O0, COUTAZ0Z_3, I0), 
        (glb16.O0, MZ0Z4, I15), (glb17.O0, MZ0Z5, I16)
    4 Output(s)
        (MZ0Z5, O0), (COUT5Z0Z_3, O1), (COUT5Z0Z_2, O2), 
        (COUT5Z0Z_1, O3)
    17 Product Term(s)

    Output MZ0Z5

        10 Input(s)
            COUT5Z0Z_0, COUT5Z0Z_1, COUT5Z0Z_2, COUTAZ0Z_0, COUT5Z0Z_3,
            COUTAZ0Z_1, MZ0Z5, COUTAZ0Z_2, MZ0Z4, COUTAZ0Z_3
        2 Fanout(s)
            glb20.I15, glb17.I16
        3 Product Term(s)
        1 GLB Level(s)

        MZ0Z5.D = (!MZ0Z5 & !COUTAZ0Z_3
            # COUT5Z0Z_0 & COUT5Z0Z_3 & COUTAZ0Z_3 & !COUT5Z0Z_1
            & !COUT5Z0Z_2)
            $ VCC
        !MZ0Z5.C = MZ0Z4
        MZ0Z5.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT5Z0Z_3

        9 Input(s)
            COUT5Z0Z_0, COUT5Z0Z_1, COUT5Z0Z_2, COUTAZ0Z_0, COUT5Z0Z_3,
            COUTAZ0Z_1, COUTAZ0Z_2, MZ0Z4, COUTAZ0Z_3
        2 Fanout(s)
            glb27.I5, glb17.I10
        5 Product Term(s)
        1 GLB Level(s)

        COUT5Z0Z_3.D = (COUT5Z0Z_3 & !COUT5Z0Z_0
            # COUT5Z0Z_3 & !COUTAZ0Z_3
            # COUT5Z0Z_2 & COUT5Z0Z_3 & !COUT5Z0Z_1
            # COUT5Z0Z_1 & COUT5Z0Z_3 & !COUT5Z0Z_2
            # COUT5Z0Z_0 & COUT5Z0Z_1 & COUT5Z0Z_2 & COUTAZ0Z_3