frequent.rpt

这是个用VHDL写的测频源程序,最大可测10M,你可以任意修改,但请你更新后发一份给我

        10 Input(s)
            MZ0Z3, MZ0Z2, COUT3Z0Z_0, COUT3Z0Z_1, COUT3Z0Z_2, COUT3Z0Z_3,
            COUTAZ0Z_0, COUTAZ0Z_1, COUTAZ0Z_2, COUTAZ0Z_3
        3 Fanout(s)
            glb18.I7, glb17.I16, glb09.I7
        3 Product Term(s)
        1 GLB Level(s)

        MZ0Z3.D = (!MZ0Z3 & !COUTAZ0Z_3
            # COUT3Z0Z_0 & COUT3Z0Z_3 & COUTAZ0Z_3 & !COUT3Z0Z_1
            & !COUT3Z0Z_2)
            $ VCC
        !MZ0Z3.C = MZ0Z2
        MZ0Z3.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT3Z0Z_3

        9 Input(s)
            MZ0Z2, COUT3Z0Z_0, COUT3Z0Z_1, COUT3Z0Z_2, COUT3Z0Z_3,
            COUTAZ0Z_0, COUTAZ0Z_1, COUTAZ0Z_2, COUTAZ0Z_3
        2 Fanout(s)
            glb17.I17, glb27.I13
        5 Product Term(s)
        1 GLB Level(s)

        COUT3Z0Z_3.D = (COUT3Z0Z_3 & !COUT3Z0Z_0
            # COUT3Z0Z_3 & !COUTAZ0Z_3
            # COUT3Z0Z_2 & COUT3Z0Z_3 & !COUT3Z0Z_1
            # COUT3Z0Z_1 & COUT3Z0Z_3 & !COUT3Z0Z_2
            # COUT3Z0Z_0 & COUT3Z0Z_1 & COUT3Z0Z_2 & COUTAZ0Z_3
            & !COUT3Z0Z_3)
        !COUT3Z0Z_3.C = MZ0Z2
        COUT3Z0Z_3.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT3Z0Z_2

        8 Input(s)
            MZ0Z2, COUT3Z0Z_0, COUT3Z0Z_1, COUT3Z0Z_2, COUTAZ0Z_0,
            COUTAZ0Z_1, COUTAZ0Z_2, COUTAZ0Z_3
        2 Fanout(s)
            glb17.I14, glb26.I14
        4 Product Term(s)
        1 GLB Level(s)

        COUT3Z0Z_2.D = COUT3Z0Z_2 & !COUT3Z0Z_0
            # COUT3Z0Z_2 & !COUT3Z0Z_1
            # COUT3Z0Z_2 & !COUTAZ0Z_3
            # COUT3Z0Z_0 & COUT3Z0Z_1 & COUTAZ0Z_3 & !COUT3Z0Z_2
        !COUT3Z0Z_2.C = MZ0Z2
        COUT3Z0Z_2.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT3Z0Z_1

        9 Input(s)
            MZ0Z2, COUT3Z0Z_0, COUT3Z0Z_1, COUT3Z0Z_2, COUT3Z0Z_3,
            COUTAZ0Z_0, COUTAZ0Z_1, COUTAZ0Z_2, COUTAZ0Z_3
        2 Fanout(s)
            glb17.I15, glb26.I15
        4 Product Term(s)
        1 GLB Level(s)

        COUT3Z0Z_1.D = COUT3Z0Z_1 & !COUT3Z0Z_0
            # COUT3Z0Z_1 & !COUTAZ0Z_3
            # COUT3Z0Z_0 & COUT3Z0Z_2 & COUTAZ0Z_3 & !COUT3Z0Z_1
            # COUT3Z0Z_0 & COUTAZ0Z_3 & !COUT3Z0Z_1 & !COUT3Z0Z_3
        !COUT3Z0Z_1.C = MZ0Z2
        COUT3Z0Z_1.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3


GLB glb18, C1

    10 Input(s)
        (glb09.O0, COUT4Z0Z_0, I3), (glb18.O3, COUT4Z0Z_1, I17), 
        (glb18.O2, COUT4Z0Z_2, I16), (glb18.O1, COUT4Z0Z_3, I10), 
        (glb16.O3, COUTAZ0Z_0, I15), (glb16.O2, COUTAZ0Z_1, I14), 
        (glb16.O1, COUTAZ0Z_2, I13), (glb16.O0, COUTAZ0Z_3, I12), 
        (glb17.O0, MZ0Z3, I7), (glb18.O0, MZ0Z4, I11)
    4 Output(s)
        (MZ0Z4, O0), (COUT4Z0Z_3, O1), (COUT4Z0Z_2, O2), 
        (COUT4Z0Z_1, O3)
    17 Product Term(s)

    Output MZ0Z4

        10 Input(s)
            MZ0Z3, COUT4Z0Z_3, COUTAZ0Z_0, COUTAZ0Z_1, COUT4Z0Z_0,
            COUTAZ0Z_2, COUT4Z0Z_1, MZ0Z4, COUTAZ0Z_3, COUT4Z0Z_2
        3 Fanout(s)
            glb19.I4, glb08.I4, glb18.I11
        3 Product Term(s)
        1 GLB Level(s)

        MZ0Z4.D = (!MZ0Z4 & !COUTAZ0Z_3
            # COUT4Z0Z_0 & COUT4Z0Z_3 & COUTAZ0Z_3 & !COUT4Z0Z_1
            & !COUT4Z0Z_2)
            $ VCC
        !MZ0Z4.C = MZ0Z3
        MZ0Z4.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT4Z0Z_3

        9 Input(s)
            MZ0Z3, COUT4Z0Z_3, COUTAZ0Z_0, COUTAZ0Z_1, COUT4Z0Z_0,
            COUTAZ0Z_2, COUT4Z0Z_1, COUTAZ0Z_3, COUT4Z0Z_2
        2 Fanout(s)
            glb28.I5, glb18.I10
        5 Product Term(s)
        1 GLB Level(s)

        COUT4Z0Z_3.D = (COUT4Z0Z_3 & !COUT4Z0Z_0
            # COUT4Z0Z_3 & !COUTAZ0Z_3
            # COUT4Z0Z_2 & COUT4Z0Z_3 & !COUT4Z0Z_1
            # COUT4Z0Z_1 & COUT4Z0Z_3 & !COUT4Z0Z_2
            # COUT4Z0Z_0 & COUT4Z0Z_1 & COUT4Z0Z_2 & COUTAZ0Z_3
            & !COUT4Z0Z_3)
        !COUT4Z0Z_3.C = MZ0Z3
        COUT4Z0Z_3.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT4Z0Z_2

        8 Input(s)
            MZ0Z3, COUTAZ0Z_0, COUTAZ0Z_1, COUT4Z0Z_0, COUTAZ0Z_2,
            COUT4Z0Z_1, COUTAZ0Z_3, COUT4Z0Z_2
        2 Fanout(s)
            glb28.I6, glb18.I16
        4 Product Term(s)
        1 GLB Level(s)

        COUT4Z0Z_2.D = COUT4Z0Z_2 & !COUT4Z0Z_0
            # COUT4Z0Z_2 & !COUT4Z0Z_1
            # COUT4Z0Z_2 & !COUTAZ0Z_3
            # COUT4Z0Z_0 & COUT4Z0Z_1 & COUTAZ0Z_3 & !COUT4Z0Z_2
        !COUT4Z0Z_2.C = MZ0Z3
        COUT4Z0Z_2.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT4Z0Z_1

        9 Input(s)
            MZ0Z3, COUT4Z0Z_3, COUTAZ0Z_0, COUTAZ0Z_1, COUT4Z0Z_0,
            COUTAZ0Z_2, COUT4Z0Z_1, COUTAZ0Z_3, COUT4Z0Z_2
        2 Fanout(s)
            glb18.I17, glb27.I8
        4 Product Term(s)
        1 GLB Level(s)

        COUT4Z0Z_1.D = COUT4Z0Z_1 & !COUT4Z0Z_0
            # COUT4Z0Z_1 & !COUTAZ0Z_3
            # COUT4Z0Z_0 & COUT4Z0Z_2 & COUTAZ0Z_3 & !COUT4Z0Z_1
            # COUT4Z0Z_0 & COUTAZ0Z_3 & !COUT4Z0Z_1 & !COUT4Z0Z_3
        !COUT4Z0Z_1.C = MZ0Z3
        COUT4Z0Z_1.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3


GLB glb19, A7

    10 Input(s)
        (glb08.O0, COUT5Z0Z_0, I3), (glb19.O3, COUT5Z0Z_1, I11), 
        (glb19.O2, COUT5Z0Z_2, I17), (glb19.O1, COUT5Z0Z_3, I16), 
        (glb16.O3, COUTAZ0Z_0, I0), (glb16.O2, COUTAZ0Z_1, I1), 
        (glb16.O1, COUTAZ0Z_2, I2), (glb16.O0, COUTAZ0Z_3, I8), 
        (glb18.O0, MZ0Z4, I4), (glb19.O0, MZ0Z5, I12)
    4 Output(s)
        (MZ0Z5, O0), (COUT5Z0Z_3, O1), (COUT5Z0Z_2, O2), 
        (COUT5Z0Z_1, O3)
    17 Product Term(s)

    Output MZ0Z5

        10 Input(s)
            COUT5Z0Z_0, COUT5Z0Z_1, COUT5Z0Z_2, COUTAZ0Z_0, COUT5Z0Z_3,
            COUTAZ0Z_1, MZ0Z5, COUTAZ0Z_2, MZ0Z4, COUTAZ0Z_3
        2 Fanout(s)
            glb19.I12, glb14.I8
        3 Product Term(s)
        1 GLB Level(s)

        MZ0Z5.D = (!MZ0Z5 & !COUTAZ0Z_3
            # COUT5Z0Z_0 & COUT5Z0Z_3 & COUTAZ0Z_3 & !COUT5Z0Z_1
            & !COUT5Z0Z_2)
            $ VCC
        !MZ0Z5.C = MZ0Z4
        MZ0Z5.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT5Z0Z_3

        9 Input(s)
            COUT5Z0Z_0, COUT5Z0Z_1, COUT5Z0Z_2, COUTAZ0Z_0, COUT5Z0Z_3,
            COUTAZ0Z_1, COUTAZ0Z_2, MZ0Z4, COUTAZ0Z_3
        2 Fanout(s)
            glb19.I16, glb26.I6
        5 Product Term(s)
        1 GLB Level(s)

        COUT5Z0Z_3.D = (COUT5Z0Z_3 & !COUT5Z0Z_0
            # COUT5Z0Z_3 & !COUTAZ0Z_3
            # COUT5Z0Z_2 & COUT5Z0Z_3 & !COUT5Z0Z_1
            # COUT5Z0Z_1 & COUT5Z0Z_3 & !COUT5Z0Z_2
            # COUT5Z0Z_0 & COUT5Z0Z_1 & COUT5Z0Z_2 & COUTAZ0Z_3
            & !COUT5Z0Z_3)
        !COUT5Z0Z_3.C = MZ0Z4
        COUT5Z0Z_3.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT5Z0Z_2

        8 Input(s)
            COUT5Z0Z_0, COUT5Z0Z_1, COUT5Z0Z_2, COUTAZ0Z_0, COUTAZ0Z_1,
            COUTAZ0Z_2, MZ0Z4, COUTAZ0Z_3
        2 Fanout(s)
            glb19.I17, glb27.I5
        4 Product Term(s)
        1 GLB Level(s)

        COUT5Z0Z_2.D = COUT5Z0Z_2 & !COUT5Z0Z_0
            # COUT5Z0Z_2 & !COUT5Z0Z_1
            # COUT5Z0Z_2 & !COUTAZ0Z_3
            # COUT5Z0Z_0 & COUT5Z0Z_1 & COUTAZ0Z_3 & !COUT5Z0Z_2
        !COUT5Z0Z_2.C = MZ0Z4
        COUT5Z0Z_2.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT5Z0Z_1

        9 Input(s)
            COUT5Z0Z_0, COUT5Z0Z_1, COUT5Z0Z_2, COUTAZ0Z_0, COUT5Z0Z_3,
            COUTAZ0Z_1, COUTAZ0Z_2, MZ0Z4, COUTAZ0Z_3
        2 Fanout(s)
            glb19.I11, glb28.I15
        4 Product Term(s)
        1 GLB Level(s)

        COUT5Z0Z_1.D = COUT5Z0Z_1 & !COUT5Z0Z_0
            # COUT5Z0Z_1 & !COUTAZ0Z_3
            # COUT5Z0Z_0 & COUT5Z0Z_2 & COUTAZ0Z_3 & !COUT5Z0Z_1
            # COUT5Z0Z_0 & COUTAZ0Z_3 & !COUT5Z0Z_3 & !COUT5Z0Z_1
        !COUT5Z0Z_1.C = MZ0Z4
        COUT5Z0Z_1.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3


GLB glb20, A1

    9 Input(s)
        (glb11.O0, COUT1Z0Z_0, I0), (glb20.O3, COUT1Z0Z_1, I17), 
        (glb20.O0, COUT1Z0Z_2, I16), (glb20.O2, COUT1Z0Z_3, I6), 
        (glb16.O3, COUTAZ0Z_0, I11), (glb16.O2, COUTAZ0Z_1, I1), 
        (glb16.O1, COUTAZ0Z_2, I2), (glb16.O0, COUTAZ0Z_3, I3), 
        (glb20.O1, MZ0Z1, I5)
    4 Output(s)
        (MZ0Z1, O1), (COUT1Z0Z_3, O2), (COUT1Z0Z_2, O0), 
        (COUT1Z0Z_1, O3)
    16 Product Term(s)

    Output MZ0Z1

        9 Input(s)
            COUT1Z0Z_2, COUT1Z0Z_3, MZ0Z1, COUTAZ0Z_0, COUTAZ0Z_1,
            COUTAZ0Z_2, COUT1Z0Z_0, COUTAZ0Z_3, COUT1Z0Z_1
        3 Fanout(s)
            glb20.I5, glb12.I5, glb13.I5
        3 Product Term(s)
        1 GLB Level(s)

        MZ0Z1.D = (!MZ0Z1 & !COUTAZ0Z_3
            # COUT1Z0Z_0 & COUT1Z0Z_3 & COUTAZ0Z_3 & !COUT1Z0Z_1
            & !COUT1Z0Z_2)
            $ VCC
        !MZ0Z1.C = MZ0Z0
        MZ0Z1.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT1Z0Z_3

        8 Input(s)
            COUT1Z0Z_2, COUT1Z0Z_3, COUTAZ0Z_0, COUTAZ0Z_1, COUTAZ0Z_2,
            COUT1Z0Z_0, COUTAZ0Z_3, COUT1Z0Z_1
        2 Fanout(s)
            glb20.I6, glb24.I9
        5 Product Term(s)
        1 GLB Level(s)

        COUT1Z0Z_3.D = (COUT1Z0Z_3 & !COUT1Z0Z_0
            # COUT1Z0Z_3 & !COUTAZ0Z_3
            # COUT1Z0Z_2 & COUT1Z0Z_3 & !COUT1Z0Z_1
            # COUT1Z0Z_1 & COUT1Z0Z_3 & !COUT1Z0Z_2
            # COUT1Z0Z_0 & COUT1Z0Z_1 & COUT1Z0Z_2 & COUTAZ0Z_3
            & !COUT1Z0Z_3)
        !COUT1Z0Z_3.C = MZ0Z0
        COUT1Z0Z_3.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT1Z0Z_2

        7 Input(s)
            COUT1Z0Z_2, COUTAZ0Z_0, COUTAZ0Z_1, COUTAZ0Z_2, COUT1Z0Z_0,
            COUTAZ0Z_3, COUT1Z0Z_1
        2 Fanout(s)
            glb20.I16, glb24.I11
        4 Product Term(s)
        1 GLB Level(s)

        COUT1Z0Z_2.D = (COUT1Z0Z_2 & !COUT1Z0Z_0
            # COUT1Z0Z_2 & !COUT1Z0Z_1
            # COUT1Z0Z_2 & !COUTAZ0Z_3
            # COUT1Z0Z_0 & COUT1Z0Z_1 & COUTAZ0Z_3 & !COUT1Z0Z_2)
        !COUT1Z0Z_2.C = MZ0Z0
        COUT1Z0Z_2.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3

    Output COUT1Z0Z_1

        8 Input(s)
            COUT1Z0Z_2, COUT1Z0Z_3, COUTAZ0Z_0, COUTAZ0Z_1, COUTAZ0Z_2,
            COUT1Z0Z_0, COUTAZ0Z_3, COUT1Z0Z_1
        2 Fanout(s)
            glb20.I17, glb23.I3
        4 Product Term(s)
        1 GLB Level(s)

        COUT1Z0Z_1.D = (COUT1Z0Z_1 & !COUT1Z0Z_0
            # COUT1Z0Z_1 & !COUTAZ0Z_3
            # COUT1Z0Z_0 & COUT1Z0Z_2 & COUTAZ0Z_3 & !COUT1Z0Z_1
            # COUT1Z0Z_0 & COUTAZ0Z_3 & !COUT1Z0Z_1 & !COUT1Z0Z_3)
        !COUT1Z0Z_1.C = MZ0Z0
        COUT1Z0Z_1.R = COUTAZ0Z_0 & COUTAZ0Z_1 & COUTAZ0Z_2 & !COUTAZ0Z_3


GLB glb21, A2

    13 Input(s)
        (glb28.O0, COUNT5Z0Z_1, I8), (glb26.O0, COUNT5Z0Z_3, I0), 
        (glb21.O3, COUNTZ0Z_0, I17), (glb21.O2, COUNTZ0Z_1, I16), 
        (glb04.O3, COUNTZ0Z_2, I12), (glb04.O2, N_948, I13), (glb07.O0, 
        OR_1154, I3), (glb06.O2, DEF_1649, I2), (glb06.O0, 
        DEF_1663, I4), (glb07.O3, AND_1664, I11), (glb13.O2, 
        DEF_1677, I6), (glb07.O1, DEF_1691, I9), (glb06.O3, 
        AND_1692, I7)
    4 Output(s)
        (TEMPZ0Z_3, O0), (TEMPZ0Z_1, O1), (COUNTZ0Z_1, O2), 
        (COUNTZ0Z_0, O3)
    11 Product Term(s)

    Output TEMPZ0Z_3

        9 Input(s)
            DEF_1677, COUNT5Z0Z_3, DEF_1691, N_948, AND_1692, COUNTZ0Z_0,
            OR_1154, COUNTZ0Z_1, COUNTZ0Z_2
        2 Fanout(s)
            glb02.I12, glb03.I12
        4 Product Term(s)
        2 GLB Level(s)

        TEMPZ0Z_3.D = COUNT5Z0Z_3 & !AND_1692 & !DEF_1677 & !DEF_1691
            # !OR_1154 & !AND_1692 & !DEF_1677 & !DEF_1691
            # !COUNTZ0Z_2 & !N_948 & !AND_1692 & !DEF_1677 & !DEF_1691
            # !COUNTZ0Z_0 & !COUNTZ0Z_1 & !N_948 & !AND_1692 & !DEF_1677
            & !DEF_1691
        TEMPZ0Z_3.C = CLKX
        TEMPZ0Z_3.R = 
    Output TEMPZ0Z_1

        9 Input(s)
            DEF_1663, COUNT5Z0Z_1, N_948, DEF_1649, COUNTZ0Z_0, OR_1154,
            COUNTZ0Z_1, AND_1664, COUNTZ0Z_2
        2 Fanout(s)
            glb02.I13, glb03.I13
        4 Product Term(s)
        2 GLB Level(s)

        TEMPZ0Z_1.D = COUNT5Z0Z_1 & !AND_1664 & !DEF_1649 & !DEF_1663
            # !OR_1154 & !AND_1664 & !DEF_1649 & !DEF_1663
            # !COUNTZ0Z_2 & !N_948 & !AND_1664 & !DEF_1649 & !DEF_1663
            # !COUNTZ0Z_0 & !COUNTZ0Z_1 & !N_948 & !AND_1664 & !DEF_1649
            & !DEF_1663
        TEMPZ0Z_1.C = CLKX
        TEMPZ0Z_1.R = 
    Output COUNTZ0Z_1

        3 Input(s)
            COUNTZ0Z_0, COUNTZ0Z_1, COUNTZ0Z_2
        6 Fanout(s)
            glb21.I16, glb05.I10, glb13.I1, glb06.I10, glb04.I1,
            glb07.I5
        2 Product Term(s)
        1 GLB Level(s)

        COUNTZ0Z_1.D = COUNTZ0Z_1 & !COUNTZ0Z_0 & !COUNTZ0Z_2
            # COUNTZ0Z_0 & !COUNTZ0Z_1 & !COUNTZ0Z_2
        COUNTZ0Z_1.C = CLKX
        COUNTZ0Z_1.R = 
    Output COUNTZ0Z_0

        1 Input(s)
            COUNTZ0Z_0
        6 Fanout(s)
            glb21.I17, glb05.I11, glb13.I0, glb06.I11, glb04.I0,
            glb07.I4
        1 Product Term(s)
        1 GLB Level(s)

        COUNTZ0Z_0.D = !COUNTZ0Z_0
        COUNTZ0Z_0.C = CLKX
        COUNTZ0Z_0.R = 

GLB glb22, D7

    12 Input(s)
        (glb22.O3, COUNT0Z0Z_0, I0), (glb22.O2, COUNT0Z0Z_1, I1), 
        (glb22.O1, COUNT0Z0Z_2, I17), (glb22.O0, COUNT6Z0Z_3, I16), 
        (glb15.O3, COUT0Z0Z_0, I15), (glb15.O2, COUT0Z0Z_1, I14),