clock.asm.bak

此程序是用单片机来控制LCD1602的

;******************************** AVR program ***********************************
;*
;* Title      :    clock  display
;* Verion     :    V01
;* OSC        :    4MHz
;* Last update:    2005.12.29
;* Author     :    Sonic
;* Description:    The program is suitable for AT90S2313
;*
;********************************************************************************

;************************* Regsister definition *********************************
;*
.include"2313def.inc"

.def      tempff = r16
.def      temp00 = r17
.def      temp08 = r18
.def      temprs = r19
.def      temp = r20
.def      delay1 = r21
.def      delay2 = r22
.def      delay3 = r23
.def      counter = r24

;*
;********************************************************************************

;********************Program code************************************************
;*
.org    $0000
      rjmp    reset       ; reset ports
      reti                ; INT0 ports( no useing )
      reti                ; INT1 ports( no useing )
      reti                ; Timer1 capture ports(no useing )
      reti                ; Timer1 compare ports( no useing )
      reti                ; Timer1 overflow ports( no useing )
      reti                ; Timer0 overflow ports( no useing )
      reti                ; UART RX complete ports( no useing )
      reti                ; UDR Empty ports( no useing )
      reti                ; UART TX complete ports( no useing )
      reti                ; Analog comparator ports( no useing )
      
.org     $000b
reset:
      ldi    temp,  low(ramend)      ;set stack address
      out    spl,  temp
      ser    tempff
      out    ddrd,  tempff
      clr    temp00
      out    ddrb,  temp00
      out    portb, temp00
      ldi    temp08, $08
cycle:
      out    portd,  temp08
      ldi    temp,  $38         ; LCD system funtion set 
      ldi    temprs,  $00       ; prepare writeing instruction to LCD
      rcall  write
      ldi    temp,  $0c         ; LCD display ON/OFF control set
      rcall  write
      ldi    temp,  $01         ; LCD display clear set
      rcall  write
      ldi    temp,  $06         ; LCD entry mode set 
      rcall  write
      ldi    temp,  $80         ; set the first DD RAM address is $00
      rcall  write
      ldi    zl,  low(chatble*2)     ; set ROM address cursor
      ldi    zh,  high(chatble*2)
      ldi    temprs,  0b00010000     ; prepare writeing data to LCD
      ldi    counter,  16            ; set counter initial value
      rcall  display
      clr    temprs
      ldi    temp,  $c0              ; set DD RAM address is $40
      rcall  write
      ldi    temprs,  0b00010000     ; prepare writeing data to LCD
      ldi    counter,  16
      rcall  display                 ; transfer display
      rcall  delay                   ; transfer delay
      ldi    counter,  16            ; resume counter initial value
      clr    temprs                  ; prepare writeing instruction to LCD
go_on:
      ldi    temp,  $18              ; LCD replacement set 
      rcall  write                   ; transfer write
      rcall  delay
      dec    counter
      brne    go_on
      rjmp    cycle
write:
      sbi    portd,  2               
      rcall  delay1us
busy:
      sbic    pinb,  7                 ; check BF =0 ?
      rjmp    busy
      out    portd,  temprs
      out    ddrb,  tempff             ; set pb as output ports
      sbi    portd,  2
      out    portb,  temp
      rcall  delay2ms                  ; transfer delay2ms
      cbi    portd,  2                 ; E=0
      out    ddrb,  temp00             ; set pb as input ports
      out    portb,  temp00
      out    portd,  temp08
      ret
display:
      lpm                              ; from ROM read data
      mov    temp,  r0
      rcall  write
      adiw    zl,  1
      dec     counter
      brne    display
      ret
delay1us:
      ldi    delay1,  2                 ; delay1us
      dec    delay1
      brne    delay1us+1
      ret
delay2ms:
      ldi    delay1,  10                ; delay2ms
      ldi    delay2,  250
      dec    delay2
      brne   delay2ms+2
      dec    delay1
      brne   delay2ms+1
      ret
delay:
      ldi    delay1,  $64               ; delay about 600ms
      ldi    delay2,  $80
      ldi    delay3,  $80
      dec    delay3
      brne   delay+3
      dec    delay2
      brne   delay+2
      dec    delay1
      brne   delay+1
      ret
chatble:
   .db $57, $45, $4c, $43, $4f, $4d, $45, $20
   .db $54, $4f, $20, $54, $48, $45, $20, $20
   .db $41, $56, $52, $20, $57, $4f, $52, $4c
   .db $44, $20, $21, $20, $20, $20, $20, $20