init.s

The latest release, ver 1.16 of the ARM (7TDMI, 720T, 920T) port for uC/OS-II V2.61 (and higher) inc

/**************************************************************************
*                                                                         *
*   PROJECT     : ARM port for uC/OS-II                                   *
*                                                                         *
*   MODULE      : INIT.s                                                  *
*                                                                         *
*   AUTHOR      : Michael Anburaj                                         *
*                 URL  : http://geocities.com/michaelanburaj/             *
*                 EMAIL: [e-mail]                       *
*                                                                         *
*   SPONSORS    : Thanks to Martin Li ([e-mail]) & Don Williams    *
*                 ([e-mail]) for sponsoring hardware.            *
*                                                                         *
*   PROCESSOR   : LPC2xxx (32 bit ARM7TDMI-S RISC core from Philips)      *
*                                                                         *
*   TOOL-CHAIN  : GCC                                                     *
*                                                                         *
*   DESCRIPTION :                                                         *
*   LPC210x processor Start up assembly code file.                        *
*                                                                         *
**************************************************************************/


#include "frmwrk.h"
#include "armdefs.h"


#define HANDLER(HandlerLabel,HandleLabel) \
HandlerLabel:                   ;\
        sub sp,sp,#4            ;\
        stmfd sp!,{r0}          ;\
        ldr r0,=HandleLabel     ;\
        ldr r0,[r0]             ;\
        str r0,[sp,#4]          ;\
        ldmfd sp!,{r0,pc}


//*****************************************************************************
// Hardware vectors
//*****************************************************************************

       .globl _start
_start:
        b ResetHandler
        b HandlerUndef                  // handlerUndef
        b HandlerSWI                    // SWI interrupt handler
        b HandlerPabort                 // handlerPAbort
        b HandlerDabort                 // handlerDAbort
        b .                             // handlerReserved
        b HandlerIRQ                    // handlerIRQ
        b HandlerFIQ                    // handlerFIQ

HANDLER(HandlerFIQ, HandleFIQ)
HANDLER(HandlerIRQ, HandleIRQ)
HANDLER(HandlerUndef, HandleUndef)
HANDLER(HandlerSWI, HandleSWI)
HANDLER(HandlerDabort, HandleDabort)
HANDLER(HandlerPabort, HandlePabort)


//*****************************************************************************
// ResetHandler - Code executed after Reset
//*****************************************************************************
ResetHandler:
        // Initialize stacks
        bl InitStacks

        // Copy the initialized data block (.data) from ROM to RAM.
		// Zero out the uninitialized data block (.bss)
        ldr r0,=_etext                  // Get pointer to ROM data
        ldr r1,=_data                   // and RAM copy
        ldr r3,=_edata                  // End address of DATA region
                        
        cmp r0,r1                       // Check that they are different
        beq 1f
0:                
        cmp r1,r3                       // Copy init data
        ldrcc r2,[r0],#4
        strcc r2,[r1],#4
        bcc 0b
1:                                      // Assuming _bss = _edata
        ldr r1,=_end                    // Top of zero init segment
        mov r2,#0
2:                
        cmp r3,r1                       // Zero init
        strcc r2,[r3],#4
        bcc 2b

program:
        // Call the actual C program.
        // Should never return.
        b C_vMain                       // C Entry (Arm/Thumb)


//*****************************************************************************
// InitStacks - Initializes stack pointer for all the processor modes
//*****************************************************************************
InitStacks:
        mrs r0,cpsr
        bic r0,r0,#MODEMASK
#ifdef UNDEF_EXCEP_APP
        orr r1,r0,#UNDEFMODE|NOINT
        msr cpsr_cxsf,r1                // UndefMode
        ldr sp,=UndefStack
#endif
        orr r1,r0,#ABORTMODE|NOINT
        msr cpsr_cxsf,r1                // AbortMode
        ldr sp,=AbortStack

        orr r1,r0,#IRQMODE|NOINT
        msr cpsr_cxsf,r1                // IRQMode
        ldr sp,=IRQStack
        
        orr r1,r0,#FIQMODE|NOINT
        msr cpsr_cxsf,r1                // FIQMode
        ldr sp,=FIQStack

        bic r0,r0,#MODEMASK|NOINT
        orr r1,r0,#SVCMODE
        msr cpsr_cxsf,r1                // SVCMode
        ldr sp,=SVCStack

        // USER mode is not initialized.

        mov pc,lr


//*****************************************************************************
// Stack memory buffers for all the processor modes
//*****************************************************************************

        .struct STK_SADDR
UserStack:
        .struct UserStack  + _SVC_STKSIZE
SVCStack:
        .struct SVCStack   + _UND_STKSIZE
UndefStack:
        .struct UndefStack + _ABT_STKSIZE
AbortStack:
        .struct AbortStack + _IRQ_STKSIZE
IRQStack:
        .struct IRQStack   + _FIQ_STKSIZE
FIQStack:


//*****************************************************************************
// Software vector table for all the exceptions
//*****************************************************************************

        .struct ISR_BADDR
HandleReset:
        .struct ISR_BADDR+0x04
HandleUndef:
        .struct ISR_BADDR+0x08
HandleSWI:
        .struct ISR_BADDR+0x0c
HandlePabort:
        .struct ISR_BADDR+0x10
HandleDabort:
        .struct ISR_BADDR+0x14
HandleReserved:
        .struct ISR_BADDR+0x18
HandleIRQ:
        .struct ISR_BADDR+0x1c
HandleFIQ:


//
//*****************************************************************************
//