frmwrk.h

The latest release, ver 1.16 of the ARM (7TDMI, 720T, 920T) port for uC/OS-II V2.61 (and higher) inc

/**************************************************************************
*                                                                         *
*   PROJECT     : ARM port for uC/OS-II                                   *
*                                                                         *
*   MODULE      : FRMWRK.h                                                *
*                                                                         *
*   AUTHOR      : Michael Anburaj                                         *
*                 URL  : http://geocities.com/michaelanburaj/             *
*                 EMAIL: [e-mail]                       *
*                                                                         *
*   SPONSORS    : Thanks to Martin Li ([e-mail]) & Don Williams    *
*                 ([e-mail]) for sponsoring hardware.            *
*                                                                         *
*   PROCESSOR   : LPC2xxx (32 bit ARM7TDMI-S RISC core from Philips)      *
*                                                                         *
*   TOOL-CHAIN  : SDT 2.51, ADS 1.2 or GCC                                *
*                                                                         *
*   DESCRIPTION :                                                         *
*   External interface & Module configuration header for FRMWRK           *
*   Infrastructure module.                                                *
*                                                                         *
**************************************************************************/


#include "lpc.h"

#ifndef __FRMWRK_H__
#define __FRMWRK_H__


#include "def.h"
#include "frmwrk_cfg.h"


#ifdef __cplusplus
extern "C" {
#endif


/* ********************************************************************* */
/* Module configuration */

#define __mDate "09/05/05"              /* Revision date */
#define __mVer  "1.16"                  /* Revision number */

#define __mAuthor "Michael Anburaj, http://geocities.com/michaelanburaj/"
#ifdef LPC2104
#define __mProcessor "LPC2104 (ARM7TDMI-S from Philips)"
#elif defined (LPC2105)
#define __mProcessor "LPC2105 (ARM7TDMI-S from Philips)"
#elif defined (LPC2106)
#define __mProcessor "LPC2106 (ARM7TDMI-S from Philips)"
#elif defined (LPC2131)
#define __mProcessor "LPC2131 (ARM7TDMI-S from Philips)"
#elif defined (LPC2132)
#define __mProcessor "LPC2132 (ARM7TDMI-S from Philips)"
#elif defined (LPC2134)
#define __mProcessor "LPC2134 (ARM7TDMI-S from Philips)"
#elif defined (LPC2136)
#define __mProcessor "LPC2136 (ARM7TDMI-S from Philips)"
#elif defined (LPC2138)
#define __mProcessor "LPC2138 (ARM7TDMI-S from Philips)"
#else
#define __mProcessor "LPC21xx (ARM7TDMI-S from Philips)"
#endif

#define __nConsolPort         0         /* Consol UART port number */
#define __nConsolBaud         115200    /* Consol Baud rate */
#define __nConsolFifoEn       True      /* FIFO Enable flag */

#define FOSC (14745600)                 /* Master Oscillator Freq. */

#define CCLK (58982400)                 /* 60Mhz */
#define PBSD 2                          /* Pheripheral Bus Speed Divider, must be 1, 2, or 4 */
#define PCLK (CCLK/PBSD)

#define PLL_MUL (CCLK/FOSC)             /* PLL Multiplier */


/* note: Reflect the changes in init.s */
#define FLASH_SADDR  0x00000000         /* Flash starting address */
#define SRAM_SADDR   0x40000000         /* SRAM starting address */

#ifdef LPC2104
#define SRAM_SIZE    (16*1024)          /* 16K internal SRAM */
#elif defined (LPC2105)
#define SRAM_SIZE    (32*1024)          /* 32K internal SRAM */
#elif defined (LPC2106)
#define SRAM_SIZE    (64*1024)          /* 64K internal SRAM */
#elif defined (LPC2131)
#define SRAM_SIZE    (8*1024)           /* 8K internal SRAM */
#elif defined (LPC2132)
#define SRAM_SIZE    (16*1024)          /* 16K internal SRAM */
#elif defined (LPC2134)
#define SRAM_SIZE    (16*1024)          /* 16K internal SRAM */
#elif defined (LPC2136)
#define SRAM_SIZE    (32*1024)          /* 32K internal SRAM */
#elif defined (LPC2138)
#define SRAM_SIZE    (32*1024)          /* 32K internal SRAM */
#else
#define SRAM_SIZE    (64*1024)          /* 64K internal SRAM */
#endif

#define SFR_BADDR    0xe0000000         /* SFR base address */

#define ISR_BADDR    0x40000000         /* ISR vector table start address */

#define SRAM_EADDR   (SRAM_SADDR+SRAM_SIZE-1) /* SRAM end address */

/* These are from init.s, for stack analysis */
#define _SVC_STKSIZE  256
#ifdef UNDEF_EXCEP_APP
#define _UND_STKSIZE  256
#else
#define _UND_STKSIZE  0
#endif
#define _ABT_STKSIZE  256
#define _IRQ_STKSIZE  256
#define _FIQ_STKSIZE  256

#define STK_SIZE      (_SVC_STKSIZE+_UND_STKSIZE+_ABT_STKSIZE+_IRQ_STKSIZE+_FIQ_STKSIZE)

#define STK_SADDR     (SRAM_EADDR+1-STK_SIZE)
/* These are from init.s, for stack analysis */


#ifndef _ASSEMBLER_
/* ********************************************************************* */
/* Interface macro & data definition */

#if defined (GCC)
extern char _end[];
#define C_wRTMem      ((U32)_end)       /* FIXME */
#define C_wRTMemLimit (STK_SADDR-1)
#else
extern __weak char Image$$DATA$$Base[];
extern __weak char Image$$DATA$$Length[];
extern __weak char Image$$DATA$$ZI$$Length[];
#define C_wRTMem      ((U32)Image$$DATA$$Base+(U32)Image$$DATA$$Length+(U32)Image$$DATA$$ZI$$Length)
#define C_wRTMemLimit (STK_SADDR-1)
#endif

#ifdef FRMWRK_VERBOSE_EN
#define VERBOSE(x) { x }
#else
#define VERBOSE(x) { }
#endif

#if (INCLUDE_CONSOL == 1)
#define SEND_NUM CONSOL_PrintNum
#define SEND_STR CONSOL_SendString
#define SEND_CHAR CONSOL_SendCh
#else
#define SEND_NUM(base,digits,sign,pad,num) 
#define SEND_STR(str)
#define SEND_CHAR(c) 
#endif


/* ********************************************************************* */
/* Interface function definition */

/*
*********************************************************************************************
*                                       FRMWRK_vRamTest
*
* Description: This routine is used do RAM test.
*
* Arguments  : pbID   - Test identification string.
*              wSAddr - RAM starting address.
*              wEAddr - RAM end address.
*
* Return     : none.
*
* Note(s)    : Do not test the following areas using this routine:
*                       1. Stack
*                       2. Software vector table
*                       3. C Variables (RW & ZI)
*********************************************************************************************
*/
void FRMWRK_vRamTest(U8 *pbID,U32 wSAddr,U32 wEAddr);

/*
*********************************************************************************************
*                                       FRMWRK_vStartTicker
*
* Description: This routine starts Timer0 in the Prescale mode for OS Tick.
*
* Arguments  : wTicksPerSec - Time ticks per second.
*
* Return     : none.
*
* Note(s)    : 
*********************************************************************************************
*/
void FRMWRK_vStartTicker(U32 wTicksPerSec); /* wTicksPerSec = 10...10000 ticks per sec */

/*
*********************************************************************************************
*                                       APP_vMain
*
* Description: This is the Application main entry function.
*
* Arguments  : none.
*
* Return     : none.
*
* Note(s)    : This function needs to be implemented in the Application.
*********************************************************************************************
*/
void APP_vMain(void);
#endif /* _ASSEMBLER_ */


/* ********************************************************************* */

#ifdef __cplusplus
}
#endif

#endif /*__FRMWRK_H__*/