syslib.c

WRS官方的基于VxWorks的X86 BSP通用模版

/* sysLib.c - templateX86 system-dependent library */

/* Copyright 1984-1999 Wind River Systems, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
TODO -	Remove the template modification history and begin a new history
	starting with version 01a and growing the history upward with
	each revision.

01j,13oct99,dat  SPR 22676 fixed declaration of end
01i,08apr99,dat  SPR 26491, PCI macro names
01h,02feb99,tm   added PCI AutoConfig support to template BSPs (SPR 24733)
01g,28jan99,dat  added MMU mappings for VME and PCI.
01f,14jan99,mas  added use of USER_D_CACHE_MODE in sysPhysMemDesc[] (SPR 24319)
01e,21jul98,db   added sysLanIntEnable(), sysLanIntDisable() and
		 sysLanEnetAddrGet().
01d,27aug97,dat  code review comments, added comments, removed
		 sysDelay().
01c,10jul97,dat  made more generic, but still uses i8259Pic.c
01b,14mar97,dat  moved PC_CONSOLE support to sysSerial.c
01a,27jan97,dat  written (from pc386/sysLib.c, ver 02u)
*/

/*
TODO - Update this documentation.

DESCRIPTION
This library provides board-specific routines.  The chip drivers included are:

    i8259Pic.c - Intel 8259 Programmable Interrupt Controller (PIC) library
    templateTimer.c - Intel 8253 timer driver
    nullNvRam.c - null NVRAM library
    templateVme.c - template VMEbus library

It #includes the following BSP stub files:
    sysSerial.c - serial device initialization routines
    sysNet.c - network subsystem routines
    sysScsi.c -	SCSI subsystem routines

X86 SPECIFICS
Because the great majority of X86 implementations use the 8259 PIC interrupt
controller chips, we have included the driver for that in this generic
template.  No other specific drivers are included, only template or null
drivers.

INCLUDE FILES: sysLib.h

SEE ALSO:
.pG "Configuration"
*/

/* includes */

#include "vxWorks.h"
#include "config.h"
#include "vme.h"
#include "memLib.h"
#include "sysLib.h"
#include "string.h"
#include "intLib.h"
#include "logLib.h"
#include "taskLib.h"
#include "vxLib.h"
#include "errnoLib.h"
#include "dosFsLib.h"
#include "stdio.h"
#include "cacheLib.h"
#include "private/vmLibP.h"
#include "arch/i86/mmuI86Lib.h"

/* imports */

IMPORT char end[];		  /* end of system, created by ld */
IMPORT GDT sysGdt[];		  /* the global descriptor table */
IMPORT VOIDFUNCPTR intEOI;	  /* pointer to a function sysIntEOI() */

/* globals */

/*
 * Decode USER_D_CACHE_MODE to determine main memory cache mode.
 * The macro MEM_STATE will be used to specify the cache state for
 * the sysPhysMemDesc table entry that describes the main memory
 * region.
 */

#if (USER_D_CACHE_MODE & CACHE_COPYBACK)
#   define MEM_STATE VM_STATE_CACHEABLE
#elif (USER_D_CACHE_MODE & CACHE_WRITETHOUGH)
#   define MEM_STATE VM_STATE_CACHEABLE_WRITETHROUGH
#else
#   define MEM_STATE VM_STATE_CACHEABLE_NOT
#endif

PHYS_MEM_DESC sysPhysMemDesc [] =
    {
    /* adrs and length parameters must be page-aligned (multiples of 0x1000) */

    /* lower memory */
    {
    (void *) LOCAL_MEM_LOCAL_ADRS,
    (void *) LOCAL_MEM_LOCAL_ADRS,
    0xa0000,	/* 640 KB */
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | MEM_STATE
    },

    /* video ram, etc */
    {
    (void *) 0xa0000,
    (void *) 0xa0000,
    0x60000,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
    },

    /* upper memory */
    {
    (void *) 0x100000,
    (void *) 0x100000,
    LOCAL_MEM_SIZE - 0x100000,	/* it is changed in sysMemTop() */
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | MEM_STATE
    },

    /* TODO -The default ROM is CACHEABLE, change if necessary. */

    {
    (void *) ROM_BASE_ADRS,
    (void *) ROM_BASE_ADRS,
    ROM_SIZE,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE_NOT  | VM_STATE_CACHEABLE
    },

    /* TODO - local I/O devices & NVRAM */

    /* TODO- Add additional entries for VME space, special I/O devices, etc */

#ifdef INCLUDE_FLASH
#endif

#ifdef INCLUDE_VME
    /* TODO - one-time setup of control registers for master window mapping */

    /* VME A16 space */

    {
    (void *) VME_A16_MSTR_LOCAL,
    (void *) VME_A16_MSTR_LOCAL,
    VME_A16_MSTR_SIZE,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
    },

    /* VME A24 space */

    {
    (void *) VME_A24_MSTR_LOCAL,
    (void *) VME_A24_MSTR_LOCAL,
    VME_A24_MSTR_SIZE,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
    },

    /* VME A32 space */

    {
    (void *) VME_A32_MSTR_LOCAL,
    (void *) VME_A32_MSTR_LOCAL,
    VME_A32_MSTR_SIZE,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
    },
#endif

#ifdef INCLUDE_PCI

    /* PCI I/O space */

    {
    (void *) PCI_MSTR_IO_LOCAL,
    (void *) PCI_MSTR_IO_LOCAL,
    PCI_MSTR_IO_SIZE,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
    },

    /* PCI MEM space */

    {
    (void *) PCI_MSTR_MEM_LOCAL,
    (void *) PCI_MSTR_MEM_LOCAL,
    PCI_MSTR_MEM_SIZE,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
    },

    /* PCI MEMIO (non-prefetch) space */

    {
    (void *) PCI_MSTR_MEMIO_LOCAL,
    (void *) PCI_MSTR_MEMIO_LOCAL,
    PCI_MSTR_MEMIO_SIZE,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
    },

    /*
     * TODO: Add additional mappings as needed to support special PCI
     * functions like memory mapped configuration space, or special IACK
     * register space.
     */

#endif
    };

int sysPhysMemDescNumEnt = NELEMENTS (sysPhysMemDesc);


int	sysCpu		= CPU;		/* system cpu type (MC680x0) */
char	*sysBootLine	= BOOT_LINE_ADRS; /* address of boot line */
char	*sysExcMsg	= EXC_MSG_ADRS;	/* catastrophic message area */
int	sysProcNum;			/* processor number of this cpu */
int	sysFlags;			/* boot flags */
char	sysBootHost [BOOT_FIELD_LEN];	/* name of host from which we booted */
char	sysBootFile [BOOT_FIELD_LEN];	/* name of file from which we booted */
UINT	sysIntIdtType	= 0x0000ef00;	/* trap gate, 0x0000ee00=int gate */
UINT	sysProcessor	= NONE;		/* 0=386, 1=486, 2=Pentium */
UINT	sysCoprocessor	= 0;		/* 0=non, 1=387, 2=487 */
UINT    sysVectorIRQ0	= INT_NUM_IRQ0;	/* vector number for IRQ0 */
GDT	*pSysGdt	= (GDT *)(LOCAL_MEM_LOCAL_ADRS + GDT_BASE_OFFSET);
int	sysCodeSelector	= CODE_SELECTOR;/* code selector for context switch */


/* locals */

LOCAL short *sysRomBase[] =
    {
    (short *)0xce000, (short *)0xce800, (short *)0xcf000, (short *)0xcf800
    };
#define ROM_SIGNATURE_SIZE	16

LOCAL char sysRomSignature[ROM_SIGNATURE_SIZE] =
    {
    0x55,0xaa,0x01,0x90,0x90,0x90,0x90,0x90,
    0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90
    };


/* Device drivers and driver sub systems */

#include "intrCtl/i8259Pic.c"
#include "mem/nullNvRam.c"
#include "vme/templateVme.c"
#include "timer/templateTimer.c"

#ifdef INCLUDE_PCI
#   include "pci/pciConfigLib.c"
#   include "pci/pciIntLib.c"
#   ifdef INCLUDE_PCI_AUTOCONF
#       include "pci/pciAutoConfigLib.c"
#       include "./sysBusPci.c"
#   endif
#endif

#include "sysSerial.c"
#include "sysNet.c"		/* network driver support */
#include "sysScsi.c"		/* scsi driver support */

/*******************************************************************************
*
* sysModel - return the model name of the CPU board
*
* This routine returns the model name of the CPU board.
*
* RETURNS: A pointer to the string "Template X86".
*/

char *sysModel (void)

    {
    return ("Template X86");
    }

/*******************************************************************************
*
* sysBspRev - return the BSP version and revision number
*
* This routine returns a pointer to a BSP version and revision number, for
* example, 1.1/0. BSP_REV is concatenated to BSP_VERSION and returned.
*
* RETURNS: A pointer to the BSP version/revision string.
*/

char * sysBspRev (void)
    {
    return (BSP_VERSION BSP_REV);
    }

/*******************************************************************************
*
* sysHwInit - initialize the system hardware
*
* This routine initializes various features of the board.
* It is the first board-specific C code executed, and runs with
* interrupts masked in the processor.
* This routine resets all devices to a quiescent state, typically
* by calling driver initialization routines.
*
* NOTE: Because this routine will be called from sysToMonitor, it must
* shutdown all potential DMA master devices.  If a device is doing DMA
* at reboot time, the DMA could interfere with the reboot. For devices
* on non-local busses, this is easy if the bus reset or sysFail line can
* be asserted.
*
* NOTE: This routine should not be called directly by the user application.
*
* RETURNS: N/A
*/

void sysHwInit (void)
    {
    /*
     * TODO - add initialization code for all devices and
     * for the interrupt controller.
     * Note: the interrupt controller should mask all interrupts here.
     * Interrupts are unmasked later on a per-device basis:
     *     device                     where unmasked
     *     ------                     --------------
     * abort switch, clock            sysHwInit2()
     * serial                         sysSerialHwInit2()
     * SCSI                           sysScsiInit()
     * LAN                            sysLanIntEnable()
     */

    /* initialize the PIC (Programmable Interrupt Controller) */

    sysIntInitPIC ();
    intEOI		= sysIntEOI;	/* system EOI ack procedure */

#if defined(INCLUDE_MMU)
    /* run-time update of the MMU entry for main RAM */

    sysPhysMemDesc[2].len = (UINT)(sysPhysMemTop () -
				sysPhysMemDesc[2].physicalAddr);
#endif

#ifdef INCLUDE_NETWORK
    sysNetHwInit ();		/* network interface */
#endif

#ifdef INCLUDE_SERIAL
    sysSerialHwInit ();		/* serial devices */
#endif

#ifdef INCLUDE_VME
    /* TODO - any VME hardware setup */
#endif

#ifdef INCLUDE_PCI
    /* TODO - any PCI hardware setup */
#endif

#ifdef INCLUDE_FLASH
    /* TODO - any Flash ROM hardware setup */
#endif
    }

/*******************************************************************************
*
* sysHwInit2 - initialize additional system hardware
*
* This routine connects system interrupt vectors and configures any
* required features not configured by sysHwInit. It is called from usrRoot()
* in usrConfig.c after the multitasking kernel has started.
*
* RETURNS: N/A
*/

void sysHwInit2 (void)
    {
    static int	initialized;	/* must protect against double call! */